Rizwan Bashirullah
According to our database1,
Rizwan Bashirullah
authored at least 43 papers
between 2002 and 2021.
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Bibliography
2021
A Reversible Low Frequency Alternating Current Nerve Conduction Block Applied to Mammalian Autonomic Nerves.
Sensors, 2021
2019
Multi-Path Integrate and Fire Circuit for Determination of Tactile Sensations in a Prosthetic Limb.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
Design and assessment of stimulation parameters for a novel peripheral nerve interface.
Proceedings of the 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2018
Ground-referenced signaling for intra-chip and short-reach chip-to-chip interconnects.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018
2017
A synthesizable time-based LDO using digital standard cells and analog pass transistor.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
Ultra-thin biocompatible implantable chip for bidirectional communication with peripheral nerves.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017
2016
A 4.7 T/11.1 T NMR Compliant 50 nW Wirelessly Programmable Implant for Bioartificial Pancreas In Vivo Monitoring.
IEEE J. Solid State Circuits, 2016
A 10 V Fully-Integrated Switched-Mode Step-up Piezo Drive Stage in 0.13µm CMOS Using Nested-Bootstrapped Switch Cells.
IEEE J. Solid State Circuits, 2016
2015
A 0.45V CMOS relaxation oscillator with ±2.5% frequency stability from -55°C to 125°C.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
A 4.7T/11.1T NMR compliant wirelessly programmable implant for bio-artificial pancreas in vivo monitoring.
Proceedings of the Symposium on VLSI Circuits, 2014
2013
A Current-Density Centric Logical Effort Delay and Power Model for High-Speed CML Gates.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
A 12.4-mW 4.5-Gb/s Receiver With Majority-Voting 1-Tap Speculative DFE in 0.13- µm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2013
High-Voltage Tolerant Digitally Aided DCM/PWM Multiphase DC-DC Boost Converter With Integrated Schottky Diodes in 0.13 µm 1.2 V Digital CMOS Process.
IEEE J. Solid State Circuits, 2013
2011
A 90-240 MHz Hysteretic Controlled DC-DC Buck Converter With Digital Phase Locked Loop Synchronization.
IEEE J. Solid State Circuits, 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2010
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
Digitally assisted discontinuous conduction mode 5V/100MHz and 10V/45MHz DC-DC boost converters with integrated Schottky diodes in standard 0.13µm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2009
IEEE Trans. Very Large Scale Integr. Syst., 2009
A Delay-Locked Loop Synchronization Scheme for High-Frequency Multiphase Hysteretic DC-DC Converters.
IEEE J. Solid State Circuits, 2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
2008
IEEE Signal Process. Mag., 2008
A 90-240MHz hysteretic controlled DC-DC buck converter with digital PLL frequency locking.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
2007
IEEE Trans. Very Large Scale Integr. Syst., 2007
IEEE Trans. Circuits Syst. II Express Briefs, 2007
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
Florida Wireless Implantable Recording Electrodes (FWIRE) for Brain Machine Interfaces.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
2006
A 16 Gb/s adaptive bandwidth on-chip bus based on hybrid current/voltage mode signaling.
IEEE J. Solid State Circuits, 2006
A low power battery management system for rechargeable wireless implantable electronics.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
A Wireless Power Interface for Rechargeable Battery Operated Neural Recording Implants.
Proceedings of the 28th International Conference of the IEEE Engineering in Medicine and Biology Society, 2006
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006
A Low Power ASK Clock and Data Recovery Circuit for Wireless Implantable Electronics.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006
2005
IEEE Trans. Circuits Syst. I Regul. Pap., 2005
Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005
2004
A hybrid current/voltage mode on-chip signaling scheme with adaptive bandwidth capability.
IEEE Trans. Very Large Scale Integr. Syst., 2004
A closed loop transcutaneous power transfer system for implantable devices with enhanced stability.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
An efficient inductive power link design for retinal prosthesis.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004
2003
IEEE Trans. Very Large Scale Integr. Syst., 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Accurate delay model and experimental verification for current/voltage mode on-chip interconnects.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 40th Design Automation Conference, 2003
2002
Delay and power model for current-mode signaling in deep submicron global interconnects.
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002