Vivek Parmar

Orcid: 0000-0001-7380-0816

According to our database1, Vivek Parmar authored at least 26 papers between 2015 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Demonstration of Differential Mode Ferroelectric Field-Effect Transistor Array-Based in-Memory Computing Macro for Realizing Multiprecision Mixed-Signal Artificial Intelligence Accelerator.
Adv. Intell. Syst., June, 2023

Fully Binarized, Parallel, RRAM-Based Computing Primitive for In-Memory Similarity Search.
IEEE Trans. Circuits Syst. II Express Briefs, 2023

Exploring Memory-Oriented Design Optimization of Edge AI Hardware for Extended Reality Applications.
IEEE Micro, 2023

Demonstration of SMT-reflow Immune and SCA-resilient PUF on 28nm RRAM device array.
Proceedings of the IEEE International Memory Workshop, 2023

Fully-Binarized Distance Computation based On-device Few-Shot Learning for XR applications.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023

Binarized-Distance Computation for performing low-power Face Recognition with optimized storage.
Proceedings of the Third International Conference on AI-ML Systems, 2023

2022
Memory-Oriented Design-Space Exploration of Edge-AI Hardware for XR Applications.
CoRR, 2022

Time-multiplexed In-memory computation scheme for mapping Quantized Neural Networks on hybrid CMOS-OxRAM building blocks.
CoRR, 2022

2021
A Hybrid CMOS-Memristive Approach to Designing Deep Generative Models.
IEEE Trans. Neural Networks Learn. Syst., 2021

MRAM-based BER resilient Quantized edge-AI Networks for Harsh Industrial Conditions.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021

2020
Exploration of Optimized Semantic Segmentation Architectures for edge-Deployment on Drones.
CoRR, 2020

Methodology for Realizing VMM with Binary RRAM Arrays: Experimental Demonstration of Binarized-ADALINE using OxRAM Crossbar.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
Contrasting Advantages of Learning With Random Weights and Backpropagation in Non-Volatile Memory Neural Networks.
IEEE Access, 2019

Design of an Optimized CMOS ELM Accelerator.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

Investigation of Unified Emerging-NVM SoC Architecture for IoT-WSN Applications.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

Hyperspectral Image Classification for Remote Sensing Using Low-Power Neuromorphic Hardware.
Proceedings of the International Joint Conference on Neural Networks, 2019

NV-BNN: An Accurate Deep Convolutional Neural Network Based on Binary STT-MRAM for Adaptive AI Edge.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018
SLIM: Simultaneous Logic-in-Memory Computing Exploiting Bilayer Analog OxRAM Devices.
CoRR, 2018

MASTISK.
CoRR, 2018

Design Exploration of Hybrid CMOS-OxRAM Deep Generative Architectures.
CoRR, 2018

MASTISK: Simulation Framework For Design Exploration Of Neuromorphic Hardware.
Proceedings of the 2018 International Joint Conference on Neural Networks, 2018

Design Exploration of IoT centric Neural Inference Accelerators.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

Low-Power Hardware-Based Deep-Learning Diagnostics Support Case Study.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018

2015
Neuromorphic Hardware Accelerated Adaptive Authentication System.
Proceedings of the IEEE Symposium Series on Computational Intelligence, 2015

Neuromorphic hybrid RRAM-CMOS RBM architecture.
Proceedings of the 15th Non-Volatile Memory Technology Symposium, 2015

OXRAM based ELM architecture for multi-class classification applications.
Proceedings of the 2015 International Joint Conference on Neural Networks, 2015


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