Hiroaki Suzuki

Orcid: 0000-0002-8899-0955

According to our database1, Hiroaki Suzuki authored at least 38 papers between 1995 and 2023.

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Bibliography

2023
Patterning-Based Self-Assembly of Specific and Functional Structures.
J. Robotics Mechatronics, October, 2023

Experimental and Numerical Investigation of Particle Capture for Agglutination-Based NP detection Using the Vibration-Induced Flow.
Proceedings of the International Symposium on Micro-NanoMehatronics and Human Science, 2023

2022
Detection of nanoparticles in a minute sample using the vibration induced flow.
Proceedings of the 17th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2022

2021
A programming environment for multi-FPGA systems based on CyberWorkBench: an integrated design tool.
Proceedings of the HEART '21: 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2021

2019
DESIGN AND EVALUATION OF MICROMIXIER WITH LOW DEAD VOLUME BASED ON VIBRATION-INDUCED FLOW.
Proceedings of the International Symposium on Micro-NanoMechatronics and Human Science, 2019

ShamFinder: An Automated Framework for Detecting IDN Homographs.
Proceedings of the Internet Measurement Conference, 2019

2018
Reagent Handling and Delivery System Using Cell-Sized Liposomes.
Proceedings of the 13th IEEE Annual International Conference on Nano/Micro Engineered and Molecular Systems, 2018

2017
The Complexity of Generalized Pipe Link Puzzles.
J. Inf. Process., 2017

2016
Self-deformable micro/nanomotors with organic-inorganic hybrid structures.
Proceedings of the 11th IEEE Annual International Conference on Nano/Micro Engineered and Molecular Systems, 2016

Do Subliminal Hints Facilitate Sequential Planning When Solving a Spatial Insight Problem?
Proceedings of the 38th Annual Meeting of the Cognitive Science Society, 2016

2015
Fillmat is NP-Complete and ASP-Complete.
J. Inf. Process., 2015

2014
A Fully Static Topologically-Compressed 21-Transistor Flip-Flop With 75% Power Saving.
IEEE J. Solid State Circuits, 2014

Exploring the Unconscious Nature of Insight Using Continuous Flash Suppression and a Dual Task.
Proceedings of the 36th Annual Meeting of the Cognitive Science Society, 2014

2013
Improving Academic Essays by Writing and Reading Peer Annotations on Source Documents.
Proceedings of the 10th International Conference on Computer-Supported Collaborative Learning, 2013

2012
Prototype Implementation of a GPU-based Interactive Coupled Fluid-Structure Simulation.
Proceedings of the 13th ACIS International Conference on Software Engineering, 2012

Automatic facilitation of social behavior by implicit inferring of social intention.
Proceedings of the 34th Annual Meeting of the Cognitive Science Society, 2012

2011
Electrical detachment of cells for engineering capillary-like structures in a photocrosslinkable hydrogel.
Proceedings of the 33rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2011

2010
Phase-adjustable error detection flip-flops with 2-stage hold-driven optimization, slack-based grouping scheme and slack distribution control for dynamic voltage scaling.
ACM Trans. Design Autom. Electr. Syst., 2010

2009
Basic examination concerning multiagent cooperation with entrainment.
Artif. Life Robotics, 2009

Eliciting Emotional Thought During Critical Reading for Academic Writing.
Proceedings of the Artificial Intelligence in Education: Building Learning Systems that Care: From Knowledge Representation to Affective Modelling, 2009

2008
Post-silicon programmed body-biasing platform suppressing device variability in 45 nm CMOS technology.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008

On-chip leakage monitor circuit to scan optimal reverse bias voltage for adaptive body-bias circuit under gate induced drain leakage effect.
Proceedings of the ESSCIRC 2008, 2008

Phase-adjustable error detection flip-flops with 2-stage hold driven optimization and slack based grouping scheme for dynamic voltage scaling.
Proceedings of the 45th Design Automation Conference, 2008

2007
Fast Tag Comparator Using Diode Partitioned Domino for 64-bit Microprocessors.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

Adaptive Supply Voltage for Low-Power Ripple-Carry and Carry-Select Adders.
IEICE Trans. Electron., 2007

2004
Comparing Software Rejuvenation Policies under Different Dependability Measures.
IEICE Trans. Inf. Syst., 2004

Low-power carry-select adder using adaptive supply voltage based on input vector patterns.
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

2003
Low Power Adder with Adaptive Supply Voltage.
Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

2002
Cost-Effective Analysis of Software Systems with Periodic Rejuvenation.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

2000
Novel VLIW code compaction method for a 3D geometry processor.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1997
Authors Reply.
IEEE J. Solid State Circuits, 1997

Comments on "Leading-zero anticipatory logic for high-speed floating point addition" [with reply].
IEEE J. Solid State Circuits, 1997

A Floating Point Divider using Redundant Binary Circuits and an Asynchronous Clock Scheme.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

1996
A 64-bit carry look ahead adder using pass transistor BiCMOS gates.
IEEE J. Solid State Circuits, 1996

Leading-zero anticipatory logic for high-speed floating point addition.
IEEE J. Solid State Circuits, 1996

A 286 MHz 64-b floating point multiplier with enhanced CG operation.
IEEE J. Solid State Circuits, 1996

An 8.8-ns 54×54-bit multiplier with high speed redundant binary architecture.
IEEE J. Solid State Circuits, 1996

1995
A BiCMOS wired-OR logic.
IEEE J. Solid State Circuits, June, 1995


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