Yuji Gendai

According to our database, Yuji Gendai authored at least 9 papers between 1996 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

A 20Gb/s QPSK Receiver with Mixed-Signal Carrier, Timing, and Data Recovery Using 3-bit ADCs.

Shunichi Kubo, Yuji Gendai, Satoshi Miura, Shinsuke Hara, Satoru Tanoi, Akifumi Kasarnatsu, Takeshi Yoshida, Satoshi Tanaka, Shuhei Arnakawa, Minoru Fujishlrna

Proceedings of the IEEE Custom Integrated Circuits Conference, 2024

2023

Back to the Analog Neural Network and Linear Circuit Theory.

Haruo Kobayashi, Manato Hirai, Kakeru Otomo, Shogo Katayama, Xueyan Bai, Masashi Chiba, Zifei Xu, Dan Yao, Lengkhang Nengvang, Minh Tri Tran, Kanji Yoshihiro, Anna Kuwana, Takato Ooide, Hiroshi Tanimoto, Yuji Gendai, Jianglin Wei

Proceedings of the 15th IEEE International Conference on ASIC, 2023

2020

Nonlinearity Analysis of Resistive Ladder-Based Current-Steering Digital-to-Analog Converter.

Manato Hirai, Hiroshi Tanimoto, Yuji Gendai, Shuhei Yamamoto, Anna Kuwana, Haruo Kobayashi

Proceedings of the International SoC Design Conference, 2020

2019

Innovative Test Practices in Japan.

Yusuke Asada, Takahiko Shimizu, Yuji Gendai, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa, Jiang-Lin Wei, Nene Kushita, Hirotaka Arai, Anna Kuwana, Takayuki Nakatani, Kazumi Hatayama, Haruo Kobayashi

Proceedings of the 37th IEEE VLSI Test Symposium, 2019

Systematic Construction of Resistor Ladder Network for N-ary DACs.

Manato Hirai, Shuhei Yamamoto, Hirotaka Arai, Anna Kuwana, Hiroshi Tanimoto, Yuji Gendai, Haruo Kobayashi

Proceedings of the 13th IEEE International Conference on ASIC, 2019

2012

A Specific Distortion Pattern of Flash ADCs Identified by Discriminating Time-Domain Analysis.

Yuji Gendai, Akira Matsuzawa

IEEE Trans. Instrum. Meas., 2012

2011

A 17.7Mpixel 120fps CMOS image sensor with 34.8Gb/s readout.

Takayuki Toyama, Koji Mishina, Koji Tsuchiya, Tatsuya Ichikawa, Hiroyuki Iwaki, Yuji Gendai, Hirotaka Murakami, Kenichi Takamiya, Hiroshi Shiroshita, Yoshinori Muramatsu, Toshihiro Furusawa

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010

The Maximum-Likelihood Noise Magnitude Estimation in ADC Linearity Measurements.

Yuji Gendai

IEEE Trans. Instrum. Meas., 2010

1996

A top down mixed-signal design methodology using a mixed-signal simulator and analog HDL.

T. Murayama, Yuji Gendai

Proceedings of the conference on European design automation, 1996