Seth Copen Goldstein

Orcid: 0000-0003-1512-0446

Affiliations:
  • Carnegie Mellon University, Pittsburgh, USA


According to our database1, Seth Copen Goldstein authored at least 100 papers between 1991 and 2024.

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Bibliography

2024
BlockGraph: a scalable secure distributed ledger that exploits locality.
Distributed Parallel Databases, June, 2024

2020
Using Peer Code Review as an Educational Tool.
Proceedings of the 2020 ACM Conference on Innovation and Technology in Computer Science Education, 2020

2019
Understanding How Work Habits influence Student Performance.
Proceedings of the 2019 ACM Conference on Innovation and Technology in Computer Science Education, 2019

2018
A time synchronization protocol for large-scale distributed embedded systems with low-precision clocks and neighbor-to-neighbor communications.
J. Netw. Comput. Appl., 2018

Electing an Approximate Center in a Huge Modular Robot with the k-BFS SumSweep Algorithm.
Proceedings of the 2018 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2018

2016
Declarative coordination of graph-based parallel programs.
Proceedings of the 21st ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2016

A Time Synchronization Protocol for Modular Robots.
Proceedings of the 24th Euromicro International Conference on Parallel, 2016

A distributed self-reconfiguration algorithm for cylindrical lattice-based modular robots.
Proceedings of the 15th IEEE International Symposium on Network Computing and Applications, 2016

Network Characterization of Lattice-Based Modular Robots with Neighbor-to-Neighbor Communications.
Proceedings of the Distributed Autonomous Robotic Systems, 2016

Approximate-Centroid Election in Large-Scale Distributed Embedded Systems.
Proceedings of the 30th IEEE International Conference on Advanced Information Networking and Applications, 2016

2015
Distributed Intelligent MEMS: Progresses and Perspectives.
IEEE Syst. J., 2015

Energy-aware parallel self-reconfiguration for chains microrobot networks.
J. Parallel Distributed Comput., 2015

ABC-Center: Approximate-center election in modular robots.
Proceedings of the 2015 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2015

Thread-Aware Logic Programming for Data-Driven Parallel Programs.
Proceedings of the Technical Communications of the 31st International Conference on Logic Programming (ICLP 2015), Cork, Ireland, August 31, 2015

2014
A Linear Logic Programming Language for Concurrent Programming over Graph Structures.
Theory Pract. Log. Program., 2014

Design and Implementation of a Multithreaded Virtual Machine for Executing Linear Logic Programs.
Proceedings of the 16th International Symposium on Principles and Practice of Declarative Programming, 2014

2012
Analysis and Modeling of Capacitive Power Transfer in Microsystems.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

2011
Detecting Locally Distributed Predicates.
ACM Trans. Auton. Adapt. Syst., 2011

Hyperform specification: designing and interacting with self-reconfiguring materials.
Pers. Ubiquitous Comput., 2011

Electrostatic actuation and control of micro robots using a post-processed high-voltage SOI CMOS chip.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Blinky blocks: a physical ensemble programming platform.
Proceedings of the International Conference on Human Factors in Computing Systems, 2011

2009
Distributed Localization of Modular Robot Ensembles.
Int. J. Robotics Res., 2009

Beyond Audio and Video: Using Claytronics to Enable Pario.
AI Mag., 2009

Register allocation deconstructed.
Proceedings of the 12th International Workshop on Software and Compilers for Embedded Systems, 2009

Design of prismatic cube modules for convex corner traversal in 3D.
Proceedings of the 2009 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2009

Stress-driven MEMS assembly + electrostatic forces = 1mm diameter robot.
Proceedings of the 2009 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2009

A tale of two planners: Modular robotic planning with LDP.
Proceedings of the 2009 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2009

A Language for Large Ensembles of Independently Executing Nodes.
Proceedings of the Logic Programming, 25th International Conference, 2009

2008
Distributed Watchpoints: Debugging Large Modular Robot Systems.
Int. J. Robotics Res., 2008

Generalizing metamodules to simplify planning in modular robotic systems.
Proceedings of the 2008 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2008

Programming modular robots with locally distributed predicates.
Proceedings of the 2008 IEEE International Conference on Robotics and Automation, 2008

Slack analysis in the system design loop.
Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, 2008

Near-optimal instruction selection on dags.
Proceedings of the Sixth International Symposium on Code Generation and Optimization (CGO 2008), 2008

Heterogeneous Latch-Based Asynchronous Pipelines.
Proceedings of the 14th IEEE International Symposium on Asynchronous Circuits and Systems, 2008

2007
A scalable distributed algorithm for shape transformation in multi-robot systems.
Proceedings of the 2007 IEEE/RSJ International Conference on Intelligent Robots and Systems, October 29, 2007

A modular robotic system using magnetic force effectors.
Proceedings of the 2007 IEEE/RSJ International Conference on Intelligent Robots and Systems, October 29, 2007

Electrostatic latching for inter-module adhesion, power transfer, and communication in modular robots.
Proceedings of the 2007 IEEE/RSJ International Conference on Intelligent Robots and Systems, October 29, 2007

Meld: A declarative approach to programming ensembles.
Proceedings of the 2007 IEEE/RSJ International Conference on Intelligent Robots and Systems, October 29, 2007

Distributed Watchpoints: Debugging Large Multi-Robot Systems.
Proceedings of the 2007 IEEE International Conference on Robotics and Automation, 2007

Operation chaining asynchronous pipelined circuits.
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

Virtualization on the Tartan Reconfigurable Architecture.
Proceedings of the FPL 2007, 2007

Global Critical Path: A Tool for System-Level Timing Analysis.
Proceedings of the 44th Design Automation Conference, 2007

Self-Resetting Latches for Asynchronous Micro-Pipelines.
Proceedings of the 44th Design Automation Conference, 2007

Area Optimizations for Dual-Rail Circuits Using Relative-Timing Analysis.
Proceedings of the 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2007), 2007

2006
Hardware compilation of application-specific memory-access interconnect.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

A global progressive register allocator.
Proceedings of the ACM SIGPLAN 2006 Conference on Programming Language Design and Implementation, 2006

Hierarchical Motion Planning for Self-reconfigurable Modular Robots.
Proceedings of the 2006 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2006

Scalable Shape Sculpting via Hole Motion: Motion Planning in Lattice-constrained Modular Robots.
Proceedings of the 2006 IEEE International Conference on Robotics and Automation, 2006

Leveraging protocol knowledge in slack matching.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

Tartan: evaluating spatial computation for whole program execution.
Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, 2006

2005
Programmable Matter.
Computer, 2005


Dataflow: A Complement to Superscalar.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2005

Why area might reduce power in nanoscale CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

The robot is the tether: active, adaptive power routing modular robots with unary inter-robot connectors.
Proceedings of the 2005 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2005

The impact of the nanoscale on computing systems.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

SOMA: a tool for synthesizing and optimizing memory accesses in ASICs.
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005

A Progressive Register Allocator for Irregular Architectures.
Proceedings of the 3nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2005), 2005

Catoms: Moving Robots Without Moving Parts.
Proceedings of the Proceedings, 2005

2004
Computing Without Processors.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 2004

Spatial computation.
Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, 2004

2003
Molecular electronics: from devices and interconnect to circuits and architecture.
Proc. IEEE, 2003

Defect Tolerance at the End of the Roadmap.
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

Nano, quantum, and molecular computing: are we ready for the validation and test challenges?
Proceedings of the Eighth IEEE International High-Level Design Validation and Test Workshop 2003, 2003

Optimizing Memory Accesses For Spatial Computation.
Proceedings of the 1st IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2003), 2003

Reconfigurable Computing and Electronic Nanotechnology.
Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003

2002
Molecular electronics: devices, systems and tools for gigagate, gigabit chips.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

Factors Influencing the Performance of a CPU-RFU Hybrid Architecture.
Proceedings of the Field-Programmable Logic and Applications, 2002

Compiling Application-Specific Hardware.
Proceedings of the Field-Programmable Logic and Applications, 2002

Mobile Memory: Improving Memory Locality in Very Large Reconfigurable Fabrics.
Proceedings of the 10th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2002), 2002

Peer-to-Peer Hardware-Software Interfaces for Reconfigurable Fabrics.
Proceedings of the 10th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2002), 2002

2001
NanoFabrics: spatial computing using molecular electronics.
Proceedings of the 28th Annual International Symposium on Computer Architecture, 2001

Will Nanotechnology Change the Way We Design and Verify Systems? (Panel).
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Configuration Caching and Swapping.
Proceedings of the Field-Programmable Logic and Applications, 2001

Static Profile-Driven Compilation for FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 2001

2000
Pipeline Reconfigurable FPGAs.
J. VLSI Signal Process., 2000

PipeRench: A Reconfigurable Architecture and Compiler.
Computer, 2000

Efficient Place and Route for Pipeline Reconfigurable Architectures.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

Interfacing Reconfigurable Logic with a CPU.
Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

Tunable Fault Tolerance for Runtime Reconfigurable Architectures.
Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

Embedded Compilation for Multimedia Applications.
Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

BitValue Inference: Detecting and Exploiting Narrow Bitwidth Computations.
Proceedings of the Euro-Par 2000, Parallel Processing, 6th International Euro-Par Conference, Munich, Germany, August 29, 2000

1999
PipeRench: A Coprocessor for Streaming multimedia Acceleration.
Proceedings of the 26th Annual International Symposium on Computer Architecture, 1999

Fast Compilation for Pipelined Reconfigurable Fabrics.
Proceedings of the 1999 ACM/SIGDA Seventh International Symposium on Field Programmable Gate Arrays, 1999

CPR: A Configuration Profiling Tool.
Proceedings of the 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 1999

A High-Performance Flexible Architecture for Cryptography.
Proceedings of the Cryptographic Hardware and Embedded Systems, 1999

1998
Retrospective: Active Messages: A Mechanism for Integrating Computation and Communication.
Proceedings of the 25 Years of the International Symposia on Computer Architecture (Selected Papers)., 1998

Managing Pipeline-Reconfigurable FPGAs.
Proceedings of the 1998 ACM/SIGDA Sixth International Symposium on Field Programmable Gate Arrays, 1998

Characterization and Parameterization of a Pipeline Reconfigurable FPGA.
Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998

1997
Order Sorted Feature Theory Unification.
J. Log. Program., 1997

1996
Lazy Threads: Implementing a Fast Parallel Call.
J. Parallel Distributed Comput., 1996

1995
Separation Constraint Partitioning - A New Algorithm for Partitioning Non-strict Programs into Sequential Threads.
Proceedings of the Conference Record of POPL'95: 22nd ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, 1995

Enabling Primitives for Compiling Parallel Languages.
Proceedings of the Languages, 1995

NIFDY: A Low Overhead, High Throughput Network Interface.
Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995

How Much Non-Strictness do Lenient Programs Require?
Proceedings of the seventh international conference on Functional programming languages and computer architecture, 1995

1993
TAM - A Compiler Controlled Threaded Abstract Machine.
J. Parallel Distributed Comput., 1993

Parallel programming in Split-C.
Proceedings of the Proceedings Supercomputing '93, 1993

Evaluation of Mechanisms for Fine-Grained Parallel Programs in the J-Machine and the CM-5.
Proceedings of the 20th Annual International Symposium on Computer Architecture, 1993

1992
Active Messages: A Mechanism for Integrated Communication and Computation.
Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, 1992

1991
Hardware-Assisted Replay of Multiprocessor Programs.
Proceedings of the ACM/ONR Workshop on Parallel and Distributed Debugging, 1991


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