Niladrish Chatterjee

According to our database, Niladrish Chatterjee authored at least 28 papers between 2010 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

GPU Domain Specialization via Composable On-Package Architecture.

Yaosheng Fu, Evgeny Bolotin, Niladrish Chatterjee, David W. Nellans, Stephen W. Keckler

ACM Trans. Archit. Code Optim., 2022

Saving PAM4 Bus Energy with SMOREs: Sparse Multi-level Opportunistic Restricted Encodings.

Mike O'Connor, Donghyuk Lee, Niladrish Chatterjee, Michael B. Sullivan, Stephen W. Keckler

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

2021

Learning Sparse Matrix Row Permutations for Efficient SpMM on GPU Architectures.

Atefeh Mehrabi, Donghyuk Lee, Niladrish Chatterjee, Daniel J. Sorin, Benjamin C. Lee, Mike O'Connor

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021

Need for Speed: Experiences Building a Trustworthy System-Level GPU Simulator.

Oreste Villa, Daniel Lustig, Zi Yan, Evgeny Bolotin, Yaosheng Fu, Niladrish Chatterjee, Nan Jiang, David W. Nellans

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2019

Near-memory data transformation for efficient sparse matrix multi-vector multiplication.

Daichi Fujiki, Niladrish Chatterjee, Donghyuk Lee, Mike O'Connor

Proceedings of the International Conference for High Performance Computing, 2019

DeLTA: GPU Performance Model for Deep Learning Applications with In-Depth Memory System Traffic Analysis.

Sangkug Lym, Donghyuk Lee, Mike O'Connor, Niladrish Chatterjee, Mattan Erez

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2019

2018

What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study.

Saugata Ghose, Abdullah Giray Yaglikçi, Raghav Gupta, Donghyuk Lee, Kais Kudrolli, William X. Liu, Hasan Hassan, Kevin K. Chang, Niladrish Chatterjee, Aditya Agrawal, Mike O'Connor, Onur Mutlu

Proc. ACM Meas. Anal. Comput. Syst., 2018

Voltron: Understanding and Exploiting the Voltage-Latency-Reliability Trade-Offs in Modern DRAM Chips to Improve Energy Efficiency.

Kevin K. Chang, Abdullah Giray Yaglikçi, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, Onur Mutlu

CoRR, 2018

Compressing DMA Engine: Leveraging Activation Sparsity for Training Deep Neural Networks.

Minsoo Rhu, Mike O'Connor, Niladrish Chatterjee, Jeff Pool, Youngeun Kwon, Stephen W. Keckler

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

Reducing Data Transfer Energy by Exploiting Similarity within a Data Transaction.

Donghyuk Lee, Mike O'Connor, Niladrish Chatterjee

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

2017

Understanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms.

Kevin K. Chang, Abdullah Giray Yaglikçi, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, Onur Mutlu

Proc. ACM Meas. Anal. Comput. Syst., 2017

Compressing DMA Engine: Leveraging Activation Sparsity for Training Deep Neural Networks.

Minsoo Rhu, Mike O'Connor, Niladrish Chatterjee, Jeff Pool, Stephen W. Keckler

CoRR, 2017

Understanding Reduced-Voltage Operation in Modern DRAM Chips: Characterization, Analysis, and Mechanisms.

Kevin K. Chang, Abdullah Giray Yaglikçi, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, Onur Mutlu

CoRR, 2017

Toward standardized near-data processing with unrestricted data placement for GPUs.

Gwangsun Kim, Niladrish Chatterjee, Mike O'Connor, Kevin Hsieh

Proceedings of the International Conference for High Performance Computing, 2017

Fine-grained DRAM: energy-efficient DRAM for extreme bandwidth systems.

Mike O'Connor, Niladrish Chatterjee, Donghyuk Lee, John M. Wilson, Aditya Agrawal, Stephen W. Keckler, William J. Dally

Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

Architecting an Energy-Efficient DRAM System for GPUs.

Niladrish Chatterjee, Mike O'Connor, Donghyuk Lee, Daniel R. Johnson, Stephen W. Keckler, Minsoo Rhu, William J. Dally

Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

2016

CLARA: Circular Linked-List Auto and Self Refresh Architecture.

Aditya Agrawal, Mike O'Connor, Evgeny Bolotin, Niladrish Chatterjee, Joel S. Emer, Stephen W. Keckler

Proceedings of the Second International Symposium on Memory Systems, 2016

Addressing service interruptions in memory with thread-to-rank assignment.

Manjunath Shevgoor, Rajeev Balasubramonian, Niladrish Chatterjee, Jung-Sik Kim

Proceedings of the 2016 IEEE International Symposium on Performance Analysis of Systems and Software, 2016

Transparent Offloading and Mapping (TOM): Enabling Programmer-Transparent Near-Data Processing in GPU Systems.

Kevin Hsieh, Eiman Ebrahimi, Gwangsun Kim, Niladrish Chatterjee, Mike O'Connor, Nandita Vijaykumar, Onur Mutlu, Stephen W. Keckler

Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016

2015

Anatomy of GPU Memory System for Multi-Application Execution.

Adwait Jog, Onur Kayiran, Tuba Kesten, Ashutosh Pattnaik, Evgeny Bolotin, Niladrish Chatterjee, Stephen W. Keckler, Mahmut T. Kandemir, Chita R. Das

Proceedings of the 2015 International Symposium on Memory Systems, 2015

2014

Why graphics programmers need to know about DRAM.

Erik Brunvand, Niladrish Chatterjee, Daniel M. Kopta

Proceedings of the Special Interest Group on Computer Graphics and Interactive Techniques Conference, 2014

Managing DRAM Latency Divergence in Irregular GPGPU Applications.

Niladrish Chatterjee, Mike O'Connor, Gabriel H. Loh, Nuwan Jayasena, Rajeev Balasubramonian

Proceedings of the International Conference for High Performance Computing, 2014

2013

Designing Efficient Memory Schedulers for Future Systems.

Niladrish Chatterjee

PhD thesis, 2013

Quantifying the relationship between the power delivery network and architectural policies in a 3D-stacked memory device.

Manjunath Shevgoor, Jung-Sik Kim, Niladrish Chatterjee, Rajeev Balasubramonian, Al Davis, Aniruddha N. Udipi

Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, 2013

2012

Leveraging Heterogeneity in DRAM Main Memories to Accelerate Critical Word Access.

Niladrish Chatterjee, Manjunath Shevgoor, Rajeev Balasubramonian, Al Davis, Zhen Fang, Ramesh Illikkal, Ravi R. Iyer

Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012

Staged Reads: Mitigating the impact of DRAM writes on DRAM reads.

Niladrish Chatterjee, Naveen Muralimanohar, Rajeev Balasubramonian, Al Davis, Norman P. Jouppi

Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012

2010

Rethinking DRAM design and organization for energy-constrained multi-cores.

Aniruddha N. Udipi, Naveen Muralimanohar, Niladrish Chatterjee, Rajeev Balasubramonian, Al Davis, Norman P. Jouppi

Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010

Micro-pages: increasing DRAM efficiency with locality-aware data placement.

Kshitij Sudan, Niladrish Chatterjee, David W. Nellans, Manu Awasthi, Rajeev Balasubramonian, Al Davis

Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, 2010