Mostafa E. Salehi

According to our database, Mostafa E. Salehi authored at least 36 papers between 2006 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Fully-Fusible Convolutional Neural Networks for End-to-End Fused Architecture with FPGA Implementation.

Iman Dadras, Sakineh Seydi, Mohammad Hasan Ahmadilivani, Jaan Raik, Mostafa E. Salehi

Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

Inter-Layer Hybrid Quantization Scheme for Hardware Friendly Implementation of Embedded Deep Neural Networks.

Najmeh Nazari, Mostafa E. Salehi

Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

2022

FaCT-LSTM: Fast and Compact Ternary Architecture for LSTM Recurrent Neural Networks.

Seyed Ahmad Mirsalari, Najmeh Nazari, Sima Sinaei, Mostafa E. Salehi, Masoud Daneshtalab

IEEE Des. Test, 2022

2021

E2BNet: MAC-free yet accurate 2-level binarized neural network accelerator for embedded systems.

Seyed Ahmad Mirsalari, Najmeh Nazari, Seyed Ali Ansarmohammadi, Mostafa E. Salehi, Soheil Ghiasi

J. Real Time Image Process., 2021

ELC-ECG: Efficient LSTM Cell for ECG Classification Based on Quantized Architecture.

Seyed Ahmad Mirsalari, Najmeh Nazari, Seyed Ali Ansarmohammadi, Sima Sinaei, Mostafa E. Salehi, Masoud Daneshtalab

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

Aging-Aware Instruction-Level Statistical Dynamic Timing Analysis for Embedded Processors.

Iraj Moghaddasi, Mostafa E. Salehi, Mehdi Kargahi

IEEE Trans. Very Large Scale Integr. Syst., 2020

Multi-level Binarized LSTM in EEG Classification for Wearable Devices.

Najmeh Nazari, Seyed Ahmad Mirsalari, Sima Sinaei, Mostafa E. Salehi, Masoud Daneshtalab

Proceedings of the 28th Euromicro International Conference on Parallel, 2020

MuBiNN: Multi-Level Binarized Recurrent Neural Network for EEG Signal Classification.

Seyed Ahmad Mirsalari, Sima Sinaei, Mostafa E. Salehi, Masoud Daneshtalab

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

Instruction-Level NBTI Stress Estimation and Its Application in Runtime Aging Prediction for Embedded Processors.

Iraj Moghaddasi, Arash Fouman, Mostafa E. Salehi, Mehdi Kargahi

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

TOT-Net: An Endeavor Toward Optimizing Ternary Neural Networks.

Najmeh Nazari, Mohammad Loni, Mostafa E. Salehi, Masoud Daneshtalab, Mikael Sjödin

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2018

Evolutionary design for energy-efficient approximate digital circuits.

Hamed Norouzi, Mostafa E. Salehi

Microprocess. Microsystems, 2018

Vulnerability Analysis of Adder Architectures Considering Design and Synthesis Constraints.

Mostafa E. Salehi, Ali Azarpeyvand, Armin Hajaboutalebi Aboutalebi

J. Electron. Test., 2018

2017

Reliability-Aware Voltage Scaling of Multicore Processors in Dark Silicon Era.

Hamid Nejatollahi, Mostafa E. Salehi

Proceedings of the Big Data and HPC: Ecosystem and Convergence, TopHPC 2017, 2017

2016

A Fast Fault-Tolerant Architecture for Sauvola Local Image Thresholding Algorithm Using Stochastic Computing.

M. Hassan Najafi, Mostafa E. Salehi

IEEE Trans. Very Large Scale Integr. Syst., 2016

Ultralow-Energy Variation-Aware Design: Adder Architecture Study.

Hamed Dorosti, Ali Teymouri, Sied Mehdi Fakhraie, Mostafa E. Salehi

IEEE Trans. Very Large Scale Integr. Syst., 2016

Fast and accurate architectural vulnerability analysis for embedded processors using Instruction Vulnerability Factor.

Ali Azarpeyvand, Mostafa E. Salehi, Seid Mehdi Fakhraie, Saeed Safari

Microprocess. Microsystems, 2016

Fast and accurate FPGA-based framework for processor architecture vulnerability analysis.

Hoda Mahdiani, Saeed Safari, Mostafa E. Salehi

Integr., 2016

2015

Voltage scaling and dark silicon in symmetric multicore processors.

Hamid Nejatollahi, Mostafa E. Salehi

J. Supercomput., 2015

2014

Customized pipeline and instruction set architecture for embedded processing engines.

Amir Yazdanbakhsh, Mostafa E. Salehi, Sied Mehdi Fakhraie

J. Supercomput., 2014

An analytical method for reliability aware instruction set extension.

Ali Azarpeyvand, Mostafa E. Salehi, Sied Mehdi Fakhraie

J. Supercomput., 2014

2012

Adaptive fault-tolerant DVFS with dynamic online AVF prediction.

Farshad Firouzi, Ali Azarpeyvand, Mostafa E. Salehi, Sied Mehdi Fakhraie

Microelectron. Reliab., 2012

Instruction set architectural guidelines for embedded packet-processing engines.

Mostafa E. Salehi, Sied Mehdi Fakhraie, Amir Yazdanbakhsh

J. Syst. Archit., 2012

Design Space Exploration to Find the Optimum Cache and Register File Size for Embedded Applications

Mehdi Alipour, Mostafa E. Salehi, Hesamodin Shojaei Baghini

CoRR, 2012

Performance-Optimum Superscalar Architecture for Embedded Applications

Mehdi Alipour, Mostafa E. Salehi

CoRR, 2012

Vulnerability Analysis for Custom Instructions.

Ali Azarpeyvand, Mostafa E. Salehi, Sied Mehdi Fakhraie

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

CIVA: Custom instruction vulnerability analysis framework.

Ali Azarpeyvand, Mostafa E. Salehi, Seid Mehdi Fakhraie

Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

2011

Dynamic Voltage and Frequency Scheduling for Embedded Processors Considering Power/Performance Tradeoffs.

Mostafa E. Salehi, Mehrzad Samadi, Mehrdad Najibi, Ali Afzali-Kusha, Massoud Pedram, Sied Mehdi Fakhraie

IEEE Trans. Very Large Scale Integr. Syst., 2011

An accurate model for soft error rate estimation considering dynamic voltage and frequency scaling effects.

Farshad Firouzi, Mostafa E. Salehi, Fan Wang, Sied Mehdi Fakhraie

Microelectron. Reliab., 2011

Low-energy GALS NoC with FIFO - Monitoring dynamic voltage scaling.

Abbas Rahimi, Mostafa E. Salehi, Siamak Mohammadi, Sied Mehdi Fakhraie

Microelectron. J., 2011

2010

Energy-aware design space exploration of registerfile for extensible processors.

Amir Yazdanbakhsh, Mehdi Kamal, Mostafa E. Salehi, Hamid Noori, Sied Mehdi Fakhraie

Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010

Reliability-Aware Dynamic Voltage and Frequency Scaling.

Farshad Firouzi, Mostafa E. Salehi, Fan Wang, Sied Mehdi Fakhraie, Saeed Safari

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

Architecture-Level Design Space Exploration of Super Scalar Microarchitecture for Network Applications.

Mostafa E. Salehi, Hamed Dorosti, Sied Mehdi Fakhraie

Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

Instruction reliability analysis for embedded processors.

Ali Azarpeyvand, Mostafa E. Salehi, Farshad Firouzi, Amir Yazdanbakhsh, Sied Mehdi Fakhraie

Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

2009

Quantitative analysis of packet-processing applications regarding architectural guidelines for network-processing-engine development.

Mostafa E. Salehi, Sied Mehdi Fakhraie

J. Syst. Archit., 2009

2008

Design of a Custom Packet Switching Engine for Network Applications.

Mostafa E. Salehi, Sied Mehdi Fakhraie, Abbas Banaiyan, Abbas Hormati

Proceedings of the Advances in Computer Science and Engineering, 2008

2006

Dynamic voltage and frequency management based on variable update intervals for frequency setting.

Mehrdad Najibi, Mostafa E. Salehi, Ali Afzali-Kusha, Massoud Pedram, Seid Mehdi Fakhraie, Hossein Pedram

Proceedings of the 2006 International Conference on Computer-Aided Design, 2006