Kazuhiko Endo

Orcid: 0000-0002-3517-3580

According to our database1, Kazuhiko Endo authored at least 19 papers between 2007 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2020
Correction to "Analytical Thermal Model for Self-Heating in Advanced FinFET Devices With Implications for Design and Reliability".
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Analysis of charge-to-hot-carrier degradation in Ge pFinFETs.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2019
Post-Si Nano Device Technology.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

2017
Advanced FinFET technologies for boosting SRAM performance.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2015
PBTI for N-type tunnel FinFETs.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

2014
Improvement of epitaxial channel quality on heavily arsenic- and boron-doped Si surfaces and impact on tunnel FET performance.
Proceedings of the 44th European Solid State Device Research Conference, 2014

Variation behavior of tunnel-FETs originated from dopant concentration at source region and channel edge configuration.
Proceedings of the 44th European Solid State Device Research Conference, 2014

2013
Analytical Thermal Model for Self-Heating in Advanced FinFET Devices With Implications for Design and Reliability.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Independent-Double-Gate FinFET SRAM Technology.
IEICE Trans. Electron., 2013

Performance limit of parallel electric field tunnel FET and improvement by modified gate and channel configurations.
Proceedings of the European Solid-State Device Research Conference, 2013

Guidelines for symmetric threshold voltage in tunnel FinFETs with single and dual metal gate electrodes.
Proceedings of the European Solid-State Device Research Conference, 2013

2012
High-Frequency Precise Characterization of Intrinsic FinFET Channel.
IEICE Trans. Electron., 2012

A 0.7-V Opamp in Scaled Low-Standby-Power FinFET Technology.
IEICE Trans. Electron., 2012

2010
Work-function variation induced fluctuation in bias-temperature-instability characteristics of emerging metal-gate devices and implications for digital design.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

0.5V FinFET SRAM with dynamic threshold control of pass gates for salvaging malfunctioned bits.
Proceedings of the 36th European Solid-State Circuits Conference, 2010

Realization of 0.7-V analog circuits by adaptive-Vt operation of FinFET.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009
Variability analysis of FinFET-based devices and circuits considering electrical confinement and width quantization.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

2008
FinFET-Based Flex-Vth SRAM Design for Drastic Standby-Leakage-Current Reduction.
IEICE Trans. Electron., 2008

2007
Flex-Pass-Gate SRAM Design for Static Noise Margin Enhancement Using FinFET-Based Technology.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007


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