Chung Hon Lam

According to our database, Chung Hon Lam authored at least 11 papers between 1995 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

Recent Progress in Phase-Change Memory Technology.

Geoffrey W. Burr, Matthew J. BrightSky, Abu Sebastian, Huai-Yu Cheng, Jau-Yi Wu, SangBum Kim, Norma E. Sosa, Nikolaos Papandreou, Hsiang-Lan Lung, Haralampos Pozidis, Evangelos Eleftheriou, Chung Hon Lam

IEEE J. Emerg. Sel. Topics Circuits Syst., 2016

2013

A 256-Mcell Phase-Change Memory Chip Operating at 2+ Bit/Cell.

Gael F. Close, Urs Frey, Jack Morrish, Richard Jordan, Scott C. Lewis, Tom Maffitt, M. J. BrightSky, Christoph Hagleitner, Chung Hon Lam, Evangelos Eleftheriou

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

Nanoscale electronic synapses using phase change devices.

Bryan L. Jackson, Bipin Rajendran, Gregory S. Corrado, Matthew J. Breitwisch, Geoffrey W. Burr, Roger Cheek, Kailash Gopalakrishnan, Simone Raoux, Charles T. Rettner, Alvaro Padilla, Alejandro G. Schrott, Rohit S. Shenoy, Bülent N. Kurdi, Chung Hon Lam, Dharmendra S. Modha

ACM J. Emerg. Technol. Comput. Syst., 2013

2011

Programming algorithms for multilevel phase-change memory.

Nikolaos Papandreou, Haralampos Pozidis, Aggeliki Pantazi, Abu Sebastian, Matthew J. Breitwisch, Chung Hon Lam, Evangelos Eleftheriou

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010

Multilevel phase-change memory.

Nikolaos Papandreou, Aggeliki Pantazi, Abu Sebastian, Matthew J. Breitwisch, Chung Hon Lam, Haralampos Pozidis, Evangelos Eleftheriou

Proceedings of the 17th IEEE International Conference on Electronics, 2010

2008

Phase-change random access memory: A scalable technology.

Simone Raoux, Geoffrey W. Burr, Matthew J. Breitwisch, Charles T. Rettner, Yi-Chou Chen, Robert M. Shelby, Martin Salinga, Daniel Krebs, Shih-Hung Chen, Hsiang-Lan Lung, Chung Hon Lam

IBM J. Res. Dev., 2008

Transition-metal-oxide-based resistance-change memories.

Siegfried F. Karg, Gerhard Ingmar Meijer, J. Georg Bednorz, Charles T. Rettner, Alejandro G. Schrott, Eric A. Joseph, Chung Hon Lam, Markus Janousch, Urs Staub, Fabio LaMattina, Santos F. Alvarado, Daniel Widmer, Richard Stutz, Ute Drechsler, Daniele Caimi

IBM J. Res. Dev., 2008

Overview of candidate device technologies for storage-class memory.

Geoffrey W. Burr, Bülent N. Kurdi, J. Campbell Scott, Chung Hon Lam, Kailash Gopalakrishnan, Rohit S. Shenoy

IBM J. Res. Dev., 2008

2005

A novel CMOS compatible embedded nonvolatile memory with zero process adder.

Matthew J. Breitwisch, Chung Hon Lam, Jeffrey B. Johnson, Steven W. Mittl, Jian W. Zhu

Proceedings of the 13th IEEE International Workshop on Memory Technology, 2005

2003

Ultralow-power SRAM technology.

Randy W. Mann, W. W. (Bill) Abadeer, Matthew J. Breitwisch, O. Bula, Jeff S. Brown, Bryant C. Colwill, Peter E. Cottrell, William T. Crocco Jr., Stephen S. Furkay, Michael J. Hauser, Terence B. Hook, Dennis Hoyniak, James M. Johnson, Chung Hon Lam, Rebecca D. Mih, J. Rivard, Atsushi Moriwaki, E. Phipps, Christopher S. Putnam, BethAnn Rainey, James J. Toomey, Mohammad Imran Younus

IBM J. Res. Dev., 2003

1995

A half-micron CMOS logic generation.

Charles W. Koburger III, William F. Clark, James W. Adkisson, Eric Adler, Paul E. Bakeman, Albert S. Bergendahl, Alan B. Botula, W. Chang, Bijan Davari, John H. Givens, Howard H. Hansen, Steven J. Holmes, David V. Horak, Chung Hon Lam, Jerome B. Lasky, Stephen E. Luce, Randy W. Mann, Glen L. Miles, James S. Nakos, Edward J. Nowak, Ghavam G. Shahidi, Yuan Taur, Francis R. White, Matthew R. Wordeman

IBM J. Res. Dev., 1995