Hyunsang Hwang
According to our database1,
Hyunsang Hwang
authored at least 22 papers
between 2004 and 2024.
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Bibliography
2024
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
2023
Experimental Demonstration of Probabilistic-Bit (p-bit) Utilizing Stochastic Oscillation of Threshold Switch Device.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Simple Binary In-Te OTS with Sub-nm HfOₓ Buffer Layer for 3D Vertical X-point Memory Applications.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
2022
Improving the SiGeAsTe Ovonic Threshold Switching (OTS) Characteristics by Microwave Annealing for Excellent Endurance (> 10<sup>11</sup>) and Low Drift Characteristics.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Effects of an interfacial dead layer on the ferroelectric HfZrOx films for low thermal budget.
Proceedings of the 20th Non-Volatile Memory Technology Symposium, 2022
2021
Ionic Sieving Through One-Atom-Thick 2D Material Enables Analog Nonvolatile Memory for Neuromorphic Computing.
CoRR, 2021
2019
Proceedings of the 19th Non-Volatile Memory Technology Symposium, 2019
2018
Proceedings of the Non-Volatile Memory Technology Symposium, 2018
Proceedings of the 2018 International Conference on IC Design & Technology, 2018
2017
Automatic ReRAM SPICE Model Generation From Empirical Data for Fast ReRAM-Circuit Coevaluation.
IEEE Trans. Very Large Scale Integr. Syst., 2017
Proceedings of the 17th Non-Volatile Memory Technology Symposium, 2017
Reducing circuit design complexity for neuromorphic machine learning systems based on Non-Volatile Memory arrays.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
Full chip integration of 3-d cross-point ReRAM with leakage-compensating write driver and disturbance-aware sense amplifier.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
Accelerating machine learning with Non-Volatile Memory: Exploring device and circuit tradeoffs.
Proceedings of the IEEE International Conference on Rebooting Computing, 2016
Large-scale neural networks implemented with Non-Volatile Memory as the synaptic weight element: Impact of conductance response.
Proceedings of the 46th European Solid-State Device Research Conference, 2016
2015
Neuromorphic Hardware System for Visual Pattern Recognition With Memristor Array and CMOS Neuron.
IEEE Trans. Ind. Electron., 2015
2014
IEEE Trans. Ind. Electron., 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
A two-step set operation for highly uniform resistive swtiching ReRAM by controllable filament.
Proceedings of the European Solid-State Device Research Conference, 2013
2005
The electronic structures and optical properties of BaTiO<sub>3</sub> and SrTiO<sub>3</sub> using first-principles calculations.
Microelectron. J., 2005
2004
Electronic structures of high-k transition metal silicates: first-principles calculations.
Microelectron. J., 2004