Zhechen Yuan

According to our database, Zhechen Yuan authored at least 2 papers between 2023 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

A 0.59μJ/pixel High-throughput Energy-efficient Neural Volume Rendering Accelerator on FPGA.

Zhechen Yuan, Binzhe Yuan, Yuhan Gu, Yueyang Zheng, Yunxiang He, Xuexin Wang, Chaolin Rao, Pingqiang Zhou, Jingyi Yu, Xin Lou

Proceedings of the IEEE Custom Integrated Circuits Conference, 2024

2023

Analysis and Design of Precision-Scalable Computation Array for Efficient Neural Radiance Field Rendering.

Kangjie Long, Chaolin Rao, Yunxiang He, Zhechen Yuan, Pingqiang Zhou, Jingyi Yu, Xin Lou

IEEE Trans. Circuits Syst. I Regul. Pap., November, 2023