Yuanyong Luo

Orcid: 0000-0002-4450-066X

According to our database¹, Yuanyong Luo authored at least 18 papers between 2018 and 2024.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

Legend:

Book

In proceedings

Article

PhD thesis

Dataset

Other

Bibliography

2024

FDM: Fused Double-Multiply Design for Low-Latency and Area- and Power-Efficient Implementation.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, January, 2024

2022

High-Throughput Low-Latency Pipelined Divider for Single-Precision Floating-Point Numbers.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2022

ML-PLAC: Multiplierless Piecewise Linear Approximation for Nonlinear Function Evaluation.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

An optimized hardware implementation of the CORDIC algorithm.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2022

Reconfigurable Multifunction Computing Unit Using an Universal Piecewise Linear Method.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

CLA Formula and its Acceleration of Architecture Design for Clustered Look-Ahead Pipelined Recursive Digital Filter.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2021

PWL-Based Architecture for the Logarithmic Computation of Floating-Point Numbers.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2021

Ultralow-Latency VLSI Architecture Based on a Linear Approximation Method for Computing Nth Roots of Floating-Point Numbers.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Effective Plug-Ins for Reducing Inference-Latency of Spiking Convolutional Neural Networks During Inference Phase.

[BibT_eX]

[DOI]

Frontiers Comput. Neurosci., 2021

2020

GH CORDIC-Based Architecture for Computing $N$ th Root of Single-Precision Floating-Point Number.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2020

PLAC: Piecewise Linear Approximation Computation for All Nonlinear Unary Functions.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2020

A Universal Method of Linear Approximation With Controllable Error for the Efficient Implementation of Transcendental Functions.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2020

An Optimized Compression Strategy for Compressor-Based Approximate Multiplier.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A CORDIC-Based Architecture with Adjustable Precision and Flexible Scalability to Implement Sigmoid and Tanh Functions.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

Corrections to "Generalized Hyperbolic CORDIC and Its Logarithmic and Exponential Computation With Arbitrary Fixed Base".

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2019

Generalized Hyperbolic CORDIC and Its Logarithmic and Exponential Computation With Arbitrary Fixed Base.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2019

CLA Formula Aided Fast Architecture Design for Clustered Look-Ahead Pipelined IIR Digital Filter.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems, 2019

2018

CORDIC-Based Architecture for Computing Nth Root and Its Implementation.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Yuanyong Luo

Timeline

Legend:

Links

Online presence:

On csauthors.net:

Bibliography

Loading...