Ya-Ting Shyu

According to our database, Ya-Ting Shyu authored at least 11 papers between 2011 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

Thermal-Aware Floorplanning and TSV-Planning for Mixed-Type Modules in a Fixed-Outline 3-D IC.

Jai-Ming Lin, Wei-Yi Chang, Hao-Yuan Hsieh, Ya-Ting Shyu, Yeong-Jar Chang, Juin-Ming Lu

IEEE Trans. Very Large Scale Integr. Syst., 2021

Thermal-Aware Fixed-Outline Floorplanning Using Analytical Models With Thermal-Force Modulation.

Jai-Ming Lin, Tai-Ting Chen, Hao-Yuan Hsieh, Ya-Ting Shyu, Yeong-Jar Chang, Juin-Ming Lu

IEEE Trans. Very Large Scale Integr. Syst., 2021

2018

A 12-b 40-MS/s Calibration-Free SAR ADC.

Chung-Wei Hsu, Soon-Jyh Chang, Chun-Po Huang, Li-Jen Chang, Ya-Ting Shyu, Chih-Huei Hou, Hwa-An Tseng, Chih-Yuan Kung, Huan-Jui Hu

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A fast thermal-aware fixed-outline floorplanning methodology based on analytical models.

Jai-Ming Lin, Tai-Ting Chen, Yen-Fu Chang, Wei-Yi Chang, Ya-Ting Shyu, Yeong-Jar Chang, Juin-Ming Lu

Proceedings of the International Conference on Computer-Aided Design, 2018

2016

A Systematic Design Methodology of Asynchronous SAR ADCs.

Chun-Po Huang, Jai-Ming Lin, Ya-Ting Shyu, Soon-Jyh Chang

IEEE Trans. Very Large Scale Integr. Syst., 2016

An Efficient and Effective Methodology to Control Turn-On Sequence of Power Switches for Power Gating Designs.

Ya-Ting Shyu, Jai-Ming Lin, Che-Chun Lin, Chun-Po Huang, Soon-Jyh Chang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

A pipeline ADC with latched-based ring amplifiers.

Wen-Tze Chen, Ya-Ting Shyu, Chun-Po Huang, Soon-Jyh Chang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2013

Effective and Efficient Approach for Power Reduction by Using Multi-Bit Flip-Flops.

Ya-Ting Shyu, Jai-Ming Lin, Chun-Po Huang, Cheng-Wu Lin, Ying-Zu Lin, Soon-Jyh Chang

IEEE Trans. Very Large Scale Integr. Syst., 2013

A 9-Bit 150-MS/s Subrange ADC Based on SAR Architecture in 90-nm CMOS.

Ying-Zu Lin, Chun-Cheng Liu, Guan-Ying Huang, Ya-Ting Shyu, Yen-Ting Liu, Soon-Jyh Chang

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

2012

A Low-Cost Bit-Error-Rate BIST Circuit for High-Speed ADCs Based on Gray Coding.

Ya-Ting Shyu, Ying-Zu Lin, Rong-Sing Chu, Guan-Ying Huang, Soon-Jyh Chang

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2012

2011

A 0.9-V 11-bit 25-MS/s binary-search SAR ADC in 90-nm CMOS.

Ying-Zu Lin, Soon-Jyh Chang, Ya-Ting Shyu, Guan-Ying Huang, Chun-Cheng Liu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011