Xuejun An

Orcid: 0009-0005-0494-6332

According to our database1, Xuejun An authored at least 28 papers between 2009 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Improving Utilization of Dataflow Unit for Multi-Batch Processing.
ACM Trans. Archit. Code Optim., March, 2024

2023
Accelerating Convolutional Neural Networks by Exploiting the Sparsity of Output Activation.
IEEE Trans. Parallel Distributed Syst., December, 2023

FSGraph: fast and scalable implementation of graph traversal on GPUs.
CCF Trans. High Perform. Comput., September, 2023

A Bucket-aware Asynchronous Single-Source Shortest Path Algorithm on GPU.
Proceedings of the 52nd International Conference on Parallel Processing Workshops, 2023

ROMA: A Reconfigurable On-chip Memory Architecture for Multi-core Accelerators.
Proceedings of the IEEE International Conference on High Performance Computing & Communications, 2023

Improving Utilization of Dataflow Architectures Through Software and Hardware Co-Design.
Proceedings of the Euro-Par 2023: Parallel Processing - 29th International Conference on Parallel and Distributed Computing, Limassol, Cyprus, August 28, 2023

2022
A Routing-Aware Mapping Method for Dataflow Architectures.
Proceedings of the Network and Parallel Computing, 2022

Parallel-Friendly and Work-Efficient Single Source Shortest Path Algorithm on Single-Node System.
Proceedings of the 24th IEEE Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, 2022

A Loop Optimization Method for Dataflow Architecture.
Proceedings of the 24th IEEE Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, 2022

2019
SwitchAgg: A Further Step Towards In-Network Computing.
Proceedings of the 2019 IEEE Intl Conf on Parallel & Distributed Processing with Applications, 2019

Understanding the Performance of In-Network Computing: A Case Study.
Proceedings of the 2019 IEEE Intl Conf on Parallel & Distributed Processing with Applications, 2019

T2HT : Traffic-Driven Machine Learning Based Hierarchical Topology Generation Model.
Proceedings of the 25th IEEE International Conference on Parallel and Distributed Systems, 2019

SwitchAgg: A Further Step Towards In-Network Computation.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

2018
Routing and Spectrum Allocation for Time Varying Traffic by Artificial Bee Colony Algorithm in Elastic Optical Networks.
Proceedings of the IEEE International Conference on Parallel & Distributed Processing with Applications, 2018

2017
HyperFatTree: A Large-Scale Tree-Based Network with Low-Radix Switches.
Int. J. Parallel Program., 2017

Regional Congestion Control in Datacenter Networks.
Proceedings of the 23rd IEEE International Conference on Parallel and Distributed Systems, 2017

2014
An Intra-Server Interconnect Fabric for Heterogeneous Computing.
J. Comput. Sci. Technol., 2014

HiNetSim: A Parallel Simulator for Large-Scale Hierarchical Direct Networks.
Proceedings of the Network and Parallel Computing, 2014

Building a large-scale direct network with low-radix routers.
Proceedings of the 20th IEEE International Conference on Parallel and Distributed Systems, 2014

Accelerating synchronization communications for high-density blade enclosure.
Proceedings of the Computing Frontiers Conference, CF'14, 2014

2013
cHPP controller: A High Performance Hyper-node Hardware Accelerator.
Proceedings of the International Conference on Parallel and Distributed Computing, 2013

Accelerating Allreduce Operation: A Switch-Based Solution.
Proceedings of the 22nd International Conference on Computer Communication and Networks, 2013

2012
Design of Hardware-Based Communication Performance Measurement Tool.
Proceedings of the 2012 IEEE International Conference on Cluster Computing, 2012

2011
Design of HPC Node with Heterogeneous Processors.
Proceedings of the 2011 IEEE International Conference on Cluster Computing (CLUSTER), 2011

2010
HPP controller: a system controller for high performance computing.
Frontiers Comput. Sci. China, 2010

HPP Controller: A System Controller Dedicated for Message Passing.
Proceedings of the 2010 International Conference on Parallel and Distributed Computing, 2010

Adding an Expressway to Accelerate the Neighborhood Communication.
Proceedings of the 12th IEEE International Conference on High Performance Computing and Communications, 2010

2009
Gemini NI: An Integration of Two Network Interfaces.
Proceedings of the International Conference on Networking, Architecture, and Storage, 2009


  Loading...