Wangyuan Zhang

According to our database1, Wangyuan Zhang authored at least 16 papers between 2007 and 2015.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2015
Aurora: A Cross-Layer Solution for Thermally Resilient Photonic Network-on-Chip.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Leveraging Non-Volatile Storage to Achieve Versatile Cache Optimizations.
IEEE Comput. Archit. Lett., 2015

2012
Aurora: A thermally resilient photonic network-on-chip architecture.
Proceedings of the 30th International IEEE Conference on Computer Design, 2012

2011
SolarCore: Solar energy driven multi-core architecture power management.
Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011

Mercury: A fast and energy-efficient multi-level cell based Phase Change Memory system.
Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011

Helmet: A resistance drift resilient architecture for multi-level cell phase change memory system.
Proceedings of the 2011 IEEE/IFIP International Conference on Dependable Systems and Networks, 2011

2009
Thermal Design Space Exploration of 3D Die Stacked Multi-core Processors Using Geospatial-Based Predictive Models.
Proceedings of the Computer Performance Evaluation and Benchmarking, 2009

Characterizing and mitigating the impact of process variations on phase change based memory systems.
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

Exploring Phase Change Memory and 3D Die-Stacking for Power/Thermal Friendly, Fast and Durable Memory Architectures.
Proceedings of the PACT 2009, 2009

2008
Microarchitecture soft error vulnerability characterization and mitigation under 3D integration technology.
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008

Modeling and Analyzing the Effect of Microarchitecture Design Parameters on Microprocessor Soft Error Vulnerability.
Proceedings of the 16th International Symposium on Modeling, 2008

Optimizing Issue Queue Reliability to Soft Errors on Simultaneous Multithreaded Architectures.
Proceedings of the 2008 International Conference on Parallel Processing, 2008

Managing multi-core soft-error reliability through utility-driven cross domain optimization.
Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008

2007
Informed Microarchitecture Design Space Exploration Using Workload Dynamics.
Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 2007

An Analysis of Microarchitecture Vulnerability to Soft Errors on Simultaneous Multithreaded Architectures.
Proceedings of the 2007 IEEE International Symposium on Performance Analysis of Systems and Software, 2007

Characterizing the Effect of Microarchitecture Design Parameters on Workload Dynamic Behavior.
Proceedings of the IEEE 10th International Symposium on Workload Characterization, 2007


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