Vincent M. Weaver

Orcid: 0000-0002-6815-9785

According to our database1, Vincent M. Weaver authored at least 22 papers between 2008 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2022
Improving HPC Security with Targeted Syscall Fuzzing.
Proceedings of the IEEE/ACM First International Workshop on Cyber Security in High Performance Computing, 2022

2018
Advanced Event-Sampling Support for PAPI.
Proceedings of the Programming and Performance Visualization Tools, 2018

A raspberry pi operating system for exploring advanced memory system concepts.
Proceedings of the International Symposium on Memory Systems, 2018

2017
Enhancing PAPI with Low-Overhead rdpmc Reads.
Proceedings of the Programming and Performance Visualization Tools, 2017

2016
A Validation of DRAM RAPL Power Measurements.
Proceedings of the Second International Symposium on Memory Systems, 2016

2015
A prototype sampling interface for PAPI.
Proceedings of the 2015 XSEDE Conference: Scientific Advancements Enabled by Enhanced Cyberinfrastructure, St. Louis, MO, USA, July 26, 2015

Self-monitoring overhead of the Linux perf_ event performance counter interface.
Proceedings of the 2015 IEEE International Symposium on Performance Analysis of Systems and Software, 2015

2014
Design and analysis of a 32-bit embedded high-performance cluster optimized for energy and performance.
Proceedings of the 1st International Workshop on Hardware-Software Co-Design for High Performance Computing, 2014

2013
MuMMI: Multiple Metrics Modeling Infrastructure.
Proceedings of the 14th ACIS International Conference on Software Engineering, 2013

PAPI 5: Measuring power, energy, and the cloud.
Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2013

Non-determinism and overcount on modern hardware performance counter implementations.
Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2013

2012
Measuring Energy and Power with PAPI.
Proceedings of the 41st International Conference on Parallel Processing Workshops, 2012

PAPI-V: Performance Monitoring for Virtual Machines.
Proceedings of the 41st International Conference on Parallel Processing Workshops, 2012

Energy Footprint of Advanced Dense Numerical Linear Algebra Using Tile Algorithms on Multicore Architectures.
Proceedings of the 2012 Second International Conference on Cloud and Green Computing, 2012

2011
Poster: new features of the PAPI hardware counter library.
Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis, 2011

Evaluation of the HPC Challenge Benchmarks in Virtualized Environments.
Proceedings of the Euro-Par 2011: Parallel Processing Workshops - CCPI, CGWS, HeteroPar, HiBB, HPCVirt, HPPC, HPSS, MDGS, ProPer, Resilience, UCHPC, VHPC, Bordeaux, France, August 29, 2011

2009
Understanding PARSEC performance on contemporary CMPs.
Proceedings of the 2009 IEEE International Symposium on Workload Characterization, 2009

PARSEC: hardware profiling of emerging workloads for CMP design.
Proceedings of the 23rd international conference on Supercomputing, 2009

Code density concerns for new architectures.
Proceedings of the 27th International Conference on Computer Design, 2009

Accomodating Diversity in CMPs with Heterogeneous Frequencies.
Proceedings of the High Performance Embedded Architectures and Compilers, 2009

2008
Can hardware performance counters be trusted?
Proceedings of the 4th International Symposium on Workload Characterization (IISWC 2008), 2008

Using Dynamic Binary Instrumentation to Generate Multi-platform SimPoints: Methodology and Accuracy.
Proceedings of the High Performance Embedded Architectures and Compilers, 2008


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