Vijay Pitchumani

According to our database, Vijay Pitchumani authored at least 35 papers between 1982 and 2013.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2013

How to reduce power in 3D IC designs: A case study with OpenSPARC T2 core.

Moongon Jung, Taigon Song, Yang Wan, Young-Joon Lee, Debabrata Mohapatra, Hong Wang, Greg Taylor, Devang Jariwala, Vijay Pitchumani, Patrick Morrow, Clair Webb, Paul Fischer, Sung Kyu Lim

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2010

Who solves the variability problem?

Nagaraj Ns, Juan C. Rey, Jamil Kawa, Robert C. Aitken, Christian Lütkemeyer, Vijay Pitchumani, Andrzej J. Strojwas, Steve Trimberger

Proceedings of the 47th Design Automation Conference, 2010

2007

Efficient Thermal via Planning Approach and Its Application in 3-D Floorplanning.

Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Shan Zeng, Jinian Bian, Wenjian Yu, Hannah Honghua Yang, Vijay Pitchumani, Chung-Kuan Cheng

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

2006

Efficient thermal-oriented 3D floorplanning and thermal via planning for two-stacked-die integration.

Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Jinian Bian, Hannah Honghua Yang, Vijay Pitchumani

ACM Trans. Design Autom. Electr. Syst., 2006

Hierarchical 3-D Floorplanning Algorithm for Wirelength Optimization.

Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Yici Cai, Jinian Bian, Hannah Honghua Yang, Vijay Pitchumani, Chung-Kuan Cheng

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

Integrating dynamic thermal via planning with 3D floorplanning algorithm.

Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Shan Zeng, Jinian Bian, Hannah Honghua Yang, Vijay Pitchumani, Chung-Kuan Cheng

Proceedings of the 2006 International Symposium on Physical Design, 2006

Variation-aware analysis: savior of the nanometer era?

Sani R. Nassif, Vijay Pitchumani, Norma Rodriguez, Dennis Sylvester, Clive Bittlestone, Riko Radojcic

Proceedings of the 43rd Design Automation Conference, 2006

A Hitchhiker's Guide to the DFM Universe.

Vijay Pitchumani

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005

A divide-and-conquer 2.5-D floorplanning algorithm based on statistical wirelength estimation.

Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Yici Cai, Jinian Bian, Hannal Yang, Prashant Saxena, Vijay Pitchumani

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Embedded tutorial I: design for manufacturability.

Vijay Pitchumani

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

Panel I: who is responsible for the design for manufacturability issues in the era of nano-technologies?

Chung-Kuan Cheng, Steve Lin, Andrew B. Kahng, Keh-Jeng Chang, Vijay Pitchumani, Toshiyuki Shibuya, Roberto Suaya, Zhiping Yu, Fook-Luen Heng, Don MacMillen

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

1999

Multi-schedule design space exploration: an alternative synthesis framework.

Mehmet Emin Dalkiliç, Vijay Pitchumani

Integr., 1999

1995

ANSA: A New Neural Net Based Scheduling Algorithm for High Level Synthesis.

M. Kemal Unaltuna, Vijay Pitchumani

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994

HSIM1 and HSIM2: Object Oriented Algorithms for VHDL Simulation.

Neeta Ganguly, Vijay Pitchumani

Proceedings of the Seventh International Conference on VLSI Design, 1994

A Stochastic Reward & Punishment Neural Network Algorithm for Circuit Bipartitioning.

M. Kemal Unaltuna, Vijay Pitchumani

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

A Multi-Schedule Approach to High-Level Synthesis.

Mehmet Emin Dalkiliç, Vijay Pitchumani

Proceedings of the Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1994

Distributed data-path synthesis on a network of workstations.

Mehmet Emin Dalkiliç, Vijay Pitchumani

Proceedings of the Fourth Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1994

Optimal Operation Scheduling Using Resource Lower Bound Estimations.

Mehmet Emin Dalkiliç, Vijay Pitchumani

Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

1993

Quadrisectioning Based Placement with a Normalized Mean Field Neural Network.

M. Kemal Unaltuna, Vijay Pitchumani

Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

Solving the scheduling problem in high level synthesis using a normalized mean field neural network.

M. Kemal Unaltuna, Mehmet Emin Dalkiliç, Vijay Pitchumani

Proceedings of International Conference on Neural Networks (ICNN'88), San Francisco, CA, USA, March 28, 1993

1992

Fault simulation on massively parallel SIMD machines algorithms, implementations and results.

Vinod Narayanan, Vijay Pitchumani

J. Electron. Test., 1992

A VHDL Fault Diagnosis Tool Using Functional Fault Models.

Vijay Pitchumani, Pankaj Mayor, Nimish Radia

IEEE Des. Test Comput., 1992

1991

Fault Diagnosis using Functional Fault Models for VHDL descriptions.

Vijay Pitchumani, Pankaj Mayor, Nimish Radia

Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

A System for Fault Diagnosis and Simulation of VHDL Descriptions.

Vijay Pitchumani, Pankaj Mayor, Nimish Radia

Proceedings of the 28th Design Automation Conference, 1991

1989

Restricted symbolic evaluation is fast and useful.

J. Lawrence Carter, Barry K. Rosen, Gordon L. Smith, Vijay Pitchumani

Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

A Massively Parallel Algorithm for Fault Simulation on the Connection Machine.

Vinod Narayanan, Vijay Pitchumani

Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

Compaction of a Routed Channel on the Connection Machine.

Shantanu Ganguly, Vijay Pitchumani

Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

1988

Functional Test Generation Based on Unate Function Theory.

Vijay Pitchumani, Satish S. Soman

IEEE Trans. Computers, 1988

: A Parallel Algorithm for Fault Simulation on the Connection Machine.

Vinod Narayanan, Vijay Pitchumani

Proceedings of the Proceedings International Test Conference 1988, 1988

1987

A Mixed HVH-VHV Algorithm for Three-Layer Channel Routing.

Vijay Pitchumani, Qisui Zhang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987

1985

Verification of Register Transfer Level Parallel Control Sequences.

Vijay Pitchumani, Edward P. Stabler

IEEE Trans. Computers, 1985

An Experiment in Programming with Full First-Order Logic.

Zerksis D. Umrigar, Vijay Pitchumani

Proceedings of the 1985 Symposium on Logic Programming, 1985

1983

An Inductive Assertion Method for Register Transfer Level Design Verification.

Vijay Pitchumani, Edward P. Stabler

IEEE Trans. Computers, 1983

Formal verification of a real-time hardware design.

Zerksis D. Umrigar, Vijay Pitchumani

Proceedings of the 20th Design Automation Conference, 1983

1982

A formal method for computer design verification.

Vijay Pitchumani, Edward P. Stabler

Proceedings of the 19th Design Automation Conference, 1982