Vasileios Kontorinis

According to our database1, Vasileios Kontorinis authored at least 12 papers between 2009 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Thunderbolt: Throughput-Optimized, Quality-of-Service-Aware Power Capping at Scale.
Proceedings of the 14th USENIX Symposium on Operating Systems Design and Implementation, 2020

Data Center Power Oversubscription with a Medium Voltage Power Plane and Priority-Aware Capping.
Proceedings of the ASPLOS '20: Architectural Support for Programming Languages and Operating Systems, 2020

2014
Enabling Dynamic Heterogeneity Through Core-on-Core Stacking.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
Adaptive architectures for peak power management.
PhD thesis, 2013

Low-current probabilistic writes for power-efficient STT-RAM caches.
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

REMEDIATE: A scalable fault-tolerant architecture for low-power NUCA cache in tiled CMPs.
Proceedings of the International Green Computing Conference, 2013

2012
Hot peripheral thermal management to mitigate cache temperature variation.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

Managing distributed UPS energy for effective power capping in data centers.
Proceedings of the 39th International Symposium on Computer Architecture (ISCA 2012), 2012

Dynamically heterogeneous cores through 3D resource pooling.
Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012

Themis: Energy Efficient Management of Workloads in Virtualized Data Centers.
Proceedings of the Euro-Par 2012: Parallel Processing Workshops, 2012

2010
Dynamic workload characterization for power efficient scheduling on CMP systems.
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010

2009
Reducing peak power with a table-driven adaptive processor core.
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009


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