Tsung-Yi Tsai

According to our database1, Tsung-Yi Tsai authored at least 17 papers between 2008 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2021
High-Accuracy Impedance Read-out Circuit for BIA-type Biomedical Sensors.
Circuits Syst. Signal Process., 2021

2˟VDD 500 MHz Digital Output Buffer with Optimal Driver Transistor Sizing for Slew Rate Self-adjustment and Leakage Reduction Using 28-nm CMOS Process.
Circuits Syst. Signal Process., 2021

2019
74-dBc SFDR 71-MHz Four-Stage Pipeline ROM-Less DDFS Using Factorized Second-Order Parabolic Equations.
IEEE Trans. Very Large Scale Integr. Syst., 2019

A Slew Rate Variation Compensated 2× VDD I/O Buffer Using Deterministic P/N-PVT Variation Detection Method.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

500 MHz 90 nm CMOS 2 \(\times \) VDD Digital Output Buffer Immunity to Process and Voltage Variations.
Circuits Syst. Signal Process., 2019

A PVT Validation Phase-Lock Loop with Multi-Band VCO Applied in Closed-Loop FOGs.
Proceedings of the International Conference on IC Design and Technology, 2019

Sampling Rate Enhancement for SAR-ADCs Using Adaptive Reset Approach for FOG Systems.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

2017
A Dynamic Leakage and Slew Rate Compensation Circuit for 40-nm CMOS Mixed-Voltage Output Buffer.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Highly Sensitive FPW-Based Microsystem for Rapid Detection of Tetrahydrocannabinol in Human Urine.
Sensors, 2017

A pipeline ROM-less DDFS using equal-division interpolation.
Proceedings of the International SoC Design Conference, 2017

2016
A nano-scale 2×VDD I/O buffer with encoded PV compensation technique.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A method of leakage reduction and slew-rate adjustment in 2×VDD output buffer for 28 nm CMOS technology and above.
Proceedings of the International Conference on IC Design and Technology, 2016

2015
Analysis of Calibrated On-Chip Temperature Sensor With Process Compensation for HV Chips.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

A 30 V rail-to-rail operational amplifier.
Microelectron. J., 2015

A high-speed 2×VDD output buffer with PVTL detection using 40-nm CMOS technology.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

2013
An innovative application by incorporating RFID technology with current available glucometer.
Proceedings of the International Joint Conference on Awareness Science and Technology & Ubi-Media Computing, 2013

2008
SIP-Based Cross-Domain Proxy Handoff for Mobile Streaming Services.
Proceedings of the 9th International Symposium on Parallel Architectures, 2008


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