Tom Melham

Orcid: 0000-0002-2462-2782

Affiliations:
  • University of Oxford, Department of Computer Science, UK


According to our database1, Tom Melham authored at least 58 papers between 1991 and 2023.

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Bibliography

2023
A Formal CHERI-C Semantics for Verification.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2023

2022
Enhancing active model learning with equivalence checking using simulation relations.
Formal Methods Syst. Des., December, 2022

Position Paper: Towards a Hybrid Approach to Protect Against Memory Safety Vulnerabilities.
Proceedings of the IEEE Secure Development Conference, 2022

Active Learning of Abstract System Models from Traces using Model Checking.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021
Active Learning of Abstract System Models from Traces using Model Checking [Extended].
CoRR, 2021

Exposing previously undetectable faults in deep neural networks.
Proceedings of the ISSTA '21: 30th ACM SIGSOFT International Symposium on Software Testing and Analysis, 2021

End-to-End Formal Verification of a RISC-V Processor Extended with Capability Pointers.
Proceedings of the Formal Methods in Computer Aided Design, 2021

DeepSynth: Automata Synthesis for Automatic Task Segmentation in Deep Reinforcement Learning.
Proceedings of the Thirty-Fifth AAAI Conference on Artificial Intelligence, 2021

2020
Semantic Adversarial Perturbations using Learnt Representations.
CoRR, 2020

Hardware/Software Co-verification Using Path-based Symbolic Execution.
CoRR, 2020

Learning Concise Models from Long Execution Traces.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
DeepSynth: Program Synthesis for Automatic Task Segmentation in Deep Reinforcement Learning.
CoRR, 2019

CREST: Hardware Formal Verification with ANSI-C Reference Specifications.
CoRR, 2019

Generating Realistic Unrestricted Adversarial Inputs using Dual-Objective GAN Training.
CoRR, 2019

Gollum: Modular and Greybox Exploit Generation for Heap Overflows in Interpreters.
Proceedings of the 2019 ACM SIGSAC Conference on Computer and Communications Security, 2019

2018
Symbolic Trajectory Evaluation.
Proceedings of the Handbook of Model Checking., 2018

Effective Verification for Low-Level Software with Competing Interrupts.
ACM Trans. Embed. Comput. Syst., 2018

Automatic Heap Layout Manipulation for Exploitation.
Proceedings of the 27th USENIX Security Symposium, 2018

Verification of tree-based hierarchical read-copy update in the Linux kernel.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Lifting CDCL to Template-Based Abstract Domains for Program Verification.
Proceedings of the Automated Technology for Verification and Analysis, 2017

2016
Generating test case chains for reactive systems.
Int. J. Softw. Tools Technol. Transf., 2016

Equivalence Checking a Floating-point Unit against a High-level C Model (Extended Version).
CoRR, 2016

Equivalence Checking of a Floating-Point Unit Against a High-Level C Model.
Proceedings of the FM 2016: Formal Methods, 2016

Unbounded safety verification for hardware using software analyzers.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
Equivalence Checking Using Trace Partitioning.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

Hardware Verification Using Software Analyzers.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

Effective verification of low-level software with nested interrupts.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2013
Chaining Test Cases for Reactive System Testing (extended version).
CoRR, 2013

On the Semantics of ReFLect as a Basis for a Reflective Theorem Prover.
CoRR, 2013

Chaining Test Cases for Reactive System Testing.
Proceedings of the Testing Software and Systems, 2013

Relational STE and theorem proving for formal verification of industrial circuit designs.
Proceedings of the Formal Methods in Computer-Aided Design, 2013

Formal co-validation of low-level hardware/software interfaces.
Proceedings of the Formal Methods in Computer-Aided Design, 2013

2009
A symbolic execution framework for algorithm-level modelling.
Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2009

Assume-guarantee validation for STE properties within an SVA environment.
Proceedings of 9th International Conference on Formal Methods in Computer-Aided Design, 2009

2008
A Refinement Approach to Design and Verification of On-Chip Communication Protocols.
Proceedings of the Formal Methods in Computer-Aided Design, 2008

2007
Automatic Abstraction in Symbolic Trajectory Evaluation.
Proceedings of the Formal Methods in Computer-Aided Design, 7th International Conference, 2007

2006
A reflective functional language for hardware design and theorem proving.
J. Funct. Program., 2006

2005
An industrially effective environment for formal hardware verification.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

Tool Building Requirements for an API to First-Order Solvers.
Proceedings of the Third Workshop on Pragmatics of Decision Procedures in Automated Reasoning, 2005

2004
Integrating Model Checking and Theorem Proving in a Reflective Functional Language.
Proceedings of the Integrated Formal Methods, 4th International Conference, 2004

2003
The PROSPER toolkit.
Int. J. Softw. Tools Technol. Transf., 2003

An AMBA-ARM7 Formal Verification Platform.
Proceedings of the Formal Methods and Software Engineering, 2003

2002
PROSPER - An Investigation into Software Architecture for Embedded Proof Engines.
Proceedings of the Frontiers of Combining Systems, 4th International Workshop, 2002

Abstraction by Symbolic Indexing Transformations.
Proceedings of the Formal Methods in Computer-Aided Design, 4th International Conference, 2002

2001
Formally Analyzed Dynamic Synthesis of Hardware.
J. Supercomput., 2001

Practical Formal Verification in Microprocessor Design.
IEEE Des. Test Comput., 2001

2000
An analysis of errors in interactive proof attempts.
Interact. Comput., 2000

The PROSPER Toolkit.
Proceedings of the Tools and Algorithms for Construction and Analysis of Systems, 2000

A Methodology for Large-Scale Hardware Verification.
Proceedings of the Formal Methods in Computer-Aided Design, Third International Conference, 2000

1999
Xs are for Trajectory Evaluation, Booleans are for Theorem Proving.
Proceedings of the Correct Hardware Design and Verification Methods, 1999

1998
Interactive Theorem Proving: An Empirical Study of User Activity.
J. Symb. Comput., 1998

Dynamic Specialization of XC6200 FPGAs by Partial Evaluation.
Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998

1996
Five Axioms of Alpha-Conversion.
Proceedings of the Theorem Proving in Higher Order Logics, 9th International Conference, 1996

1994
A Mechanized Theory of the Pi-Calculus in HOL.
Nord. J. Comput., 1994

1993
The HOL Logic Extended with Quantification over Type Variables.
Formal Methods Syst. Des., 1993

Translating Dependent Type Theory into Higher Order Logic.
Proceedings of the Typed Lambda Calculi and Applications, 1993

Higher Order Logic and Hardware Verification.
Cambridge Tracts in Theoretical Computer Science 31, Cambridge University Press, ISBN: 9780521417181, 1993

1991
A Package for Inductive Relation Definitions in HOL.
Proceedings of the 1991 International Workshop on the HOL Theorem Proving System and its Applications, 1991


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