Tim Todman

Orcid: 0000-0003-0524-0786

Affiliations:
  • Imperial College London, UK


According to our database1, Tim Todman authored at least 45 papers between 2001 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2023
Exploring Machine Learning Adoption in Customisable Processor Design.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

2022
Custom Instructions for Networked Processor Templates.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Non-deterministic event brokered computing.
Proceedings of the HEART 2022: International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, Tsukuba, Japan, June 9, 2022

2021
Custom enhancements to networked processor templates.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021

2020
Exploring performance enhancement of event-driven processor networks.
Proceedings of the International Conference on Field-Programmable Technology, 2020

Artisan: a Meta-Programming Approach For Codifying Optimisation Strategies.
Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020

2018
Lossy Multiport Memory.
Proceedings of the International Conference on Field-Programmable Technology, 2018

2017
Transparent In-Circuit Assertions for FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

DeepPump: Multi-pumping deep Neural Networks.
Proceedings of the 28th IEEE International Conference on Application-specific Systems, 2017

In-Circuit Assertions and Exceptions for Reconfigurable Hardware Design.
Proceedings of the Provably Correct Systems, 2017

2016
Self-adaptive Hardware Acceleration on a Heterogeneous Cluster.
Proceedings of the Self-aware Computing Systems - An Engineering Approach, 2016

Self-aware Hardware Acceleration of Financial Applications on a Heterogeneous Cluster.
Proceedings of the Self-aware Computing Systems - An Engineering Approach, 2016

EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures.
Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2016

Knowledge Transfer in Automatic Optimisation of Reconfigurable Designs.
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

2015
FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration.
Microprocess. Microsystems, 2015

In-circuit temporal monitors for runtime verification of reconfigurable designs.
Proceedings of the 52nd Annual Design Automation Conference, 2015

2014
Using Statistical Assertions to Guide Self-Adaptive Systems.
Int. J. Reconfigurable Comput., 2014

Transparent insertion of latency-oblivious logic onto FPGAs.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

2013
Runtime assertions and exceptions for streaming systems.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

2012
Automated Mapping of the MapReduce Pattern onto Parallel Computing Platforms.
J. Signal Process. Syst., 2012

Optimizing Hardware Design by Composing Utility-Directed Transformations.
IEEE Trans. Computers, 2012

Smart technologies for effective reconfiguration: The FASTER approach.
Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012

Verification of streaming hardware and software codesigns.
Proceedings of the 2012 International Conference on Field-Programmable Technology, 2012

Verification of streaming designs by combining symbolic simulation and equivalence checking.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Novel Design Methods and a Tool Flow for Unleashing Dynamic Reconfiguration.
Proceedings of the 15th IEEE International Conference on Computational Science and Engineering, 2012

Reconfigurable Design Automation by High-Level Exploration.
Proceedings of the 23rd IEEE International Conference on Application-Specific Systems, 2012

2010
Convex models for accelerating applications on FPGA-based clusters.
Proceedings of the International Conference on Field-Programmable Technology, 2010

A Scripting Engine for Combining Design Transformations.
Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010

Customizable Composition and Parameterization of Hardware Design Transformations.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

Combining optimizations in automated low power design.
Proceedings of the Design, Automation and Test in Europe, 2010

2009
Design Validation by Symbolic Simulation and Equivalence Checking: A Case Study in Memory Optimization for Image Manipulation.
Proceedings of the SOFSEM 2009: Theory and Practice of Computer Science, 2009

A high-level compilation toolchain for heterogeneous systems.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

Optimising designs by combining model-based and pattern-based transformations.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

2008
Smart Enumeration: A Systematic Approach to Exhaustive Search.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008

2007
Domain Specific Transformations for Hardware Ray Tracing.
Proceedings of the 30th Communicating Process Architectures Conference, 2007

Improving Bounds for FPGA Logic Minimization.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

2005
Customisable Hardware Compilation.
J. Supercomput., 2005

Reconfigurable Designs for Radiosity.
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

2004
Memory optimisations for high-resolution imaging.
Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

Methods and Tools for High-Resolution Imaging.
Proceedings of the Field Programmable Logic and Application, 2004

2003
A customisable framework for hardware compilation.
PhD thesis, 2003

Combining Imperative and Declarative Hardware Descriptions.
Proceedings of the 36th Hawaii International Conference on System Sciences (HICSS-36 2003), 2003

Real-time Extensions to a C-like Hardware Description Language.
Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

2001
Reconfigurable Designs for Ray Tracing.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001


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