Szymon Kulis

According to our database, Szymon Kulis authored at least 4 papers between 2019 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Smart-Redundancy With In Memory ECC Checking: Low-Power SEE-Resistant FPGA Architectures.

Aurélien Alacchi, Edouard Giacomin, Roman Gauchi, Szymon Kulis, Pierre-Emmanuel Gaillardon

IEEE Trans. Very Large Scale Integr. Syst., August, 2023

2020

A Low Noise Fault Tolerant Radiation Hardened 2.56 Gbps Clock-Data Recovery Circuit With High Speed Feed Forward Correction in 65 nm CMOS.

Stefan Biereigel, Szymon Kulis, Pedro Leitao, Rui Francisco, Paulo Moreira, Paul Leroux, Jeffrey Prinzie

IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020

2019

A High-resolution, Wide-range, Radiation-hard Clock Phase-shifter in a 65 nm CMOS Technology.

Szymon Kulis, Dongxu Yang, Datao Ghong, Jose Fonseca, Stefan Biereigel, Jingbo Ye, Paulo Moreira

Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019

A Low Noise Fault Tolerant Radiation Hardened 2.56 Gbps Clock-Data Recovery Circuit with High Speed Feed Forward Correction in 65 nm CMOS.

Jeffrey Prinzie, Szymon Kulis, Pedro Leitao, Rui Francisco, Valentijn De Smedt, Paulo Moreira, Paul Leroux

Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019