Suresh K. Sitaraman

According to our database1, Suresh K. Sitaraman authored at least 11 papers between 2007 and 2019.

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Bibliography

2019
Multigated Carbon Nanotube Field Effect Transistors-Based Physically Unclonable Functions As Security Keys.
IEEE Internet Things J., 2019

2018
Random vibration analysis of 3-Arc-Fan compliant interconnects.
Microelectron. Reliab., 2018

A Monobit Built-In Test and Diagnostic System for Flexible Electronic Interconnect.
Proceedings of the 27th IEEE Asian Test Symposium, 2018

2014
Experimental evaluation of SnAgCu solder joint reliability in 100-μm pitch flip-chip assemblies.
Microelectron. Reliab., 2014

2013
Failure analysis of through-silicon vias in free-standing wafer under thermal-shock test.
Microelectron. Reliab., 2013

Compliance analysis of multi-path fan-shaped interconnects.
Microelectron. Reliab., 2013

2011
Full-chip through-silicon-via interfacial crack analysis and optimization for 3D IC.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

2010
Laser moiré interferometry for fatigue life prediction of lead-free solders.
Microelectron. Reliab., 2010

ROM: a reliability knowledge representation for collaborative system design.
Eng. Comput., 2010

2008
ZAP: a knowledge-based FEA modeling method for highly coupled variable topology multi-body problems.
Eng. Comput., 2008

2007
Universal fatigue life prediction equation for ceramic ball grid array (CBGA) packages.
Microelectron. Reliab., 2007


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