Surajit Das

Orcid: 0000-0002-3891-6140

According to our database1, Surajit Das authored at least 14 papers between 2016 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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On csauthors.net:

Bibliography

2024
Review, Limitations, and future prospects of neural network approaches for brain tumor classification.
Multim. Tools Appl., May, 2024

FedEL: Federated Education Learning for generating correlations between course outcomes and program outcomes for Internet of Education Things.
Internet Things, April, 2024

Generalized Dombi-based probabilistic hesitant fuzzy consensus reaching model for supplier selection under healthcare supply chain framework.
Eng. Appl. Artif. Intell., 2024

RTL Simulation Acceleration with Machine Learning Models.
Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

2023
XAI-reduct: accuracy preservation despite dimensionality reduction for heart disease classification using explainable AI.
J. Supercomput., November, 2023

Advanced Optimization Techniques & Its Application in AI-Powered Breast Cancer Classification.
Proceedings of the 15th International Conference on Developments in eSystems Engineering, 2023

2022
Arc Model and DDG: Deadlock Avoidance and Detection in Torus NoC.
IEEE Embed. Syst. Lett., 2022

Accelerating NoC Verification Using a Complete Model and Active Window.
IEEE Access, 2022

2021
Error rate reduction of Air Quality Parameters in Health Care Industry using SD-IoT Environment.
Proceedings of the 19th OITS International Conference on Information Technology, 2021

2020
Formal Modeling of Network-on-Chip Using CFSM and its Application in Detecting Deadlock.
IEEE Trans. Very Large Scale Integr. Syst., 2020

2019
SIMAS: smart IoT model for acute stroke avoidance.
Int. J. Sens. Networks, 2019

2018
Fabrication and Characterization of Magnetostrictive Micro-Cantilevers.
Proceedings of the 2018 IEEE SENSORS, New Delhi, India, October 28-31, 2018, 2018

2017
xMAS Based Accurate Modeling and Progress Verification of NoCs.
Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

2016
Tag only storage for capacity optimised last level cache in chip multiprocessors.
Proceedings of the 20th International Symposium on VLSI Design and Test, 2016


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