Steven Derrien

According to our database, Steven Derrien authored at least 80 papers between 2000 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

An Irredundant and Compressed Data Layout to Optimize Bandwidth Utilization of FPGA Accelerators.

Corentin Ferry, Nicolas Derumigny, Steven Derrien, Sanjay V. Rajopadhye

CoRR, 2024

A Unified Memory Dependency Framework for Speculative High-Level Synthesis.

Jean-Michel Gorius, Simon Rokicki, Steven Derrien

Proceedings of the 33rd ACM SIGPLAN International Conference on Compiler Construction, 2024

2023

Increasing FPGA Accelerators Memory Bandwidth With a Burst-Friendly Memory Layout.

Corentin Ferry, Tomofumi Yuki, Steven Derrien, Sanjay V. Rajopadhye

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2023

An Irredundant Decomposition of Data Flow with Affine Dependences.

Corentin Ferry, Steven Derrien, Sanjay V. Rajopadhye

CoRR, 2023

Rapid Prototyping of Complex Micro-architectures Through High-Level Synthesis.

Sara Sadat Hoseininasab, Caroline Collange, Steven Derrien

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2023

Automatic Algorithm-Based Fault Tolerance (AABFT) of Stencil Computations.

Louis Narmour, Steven Derrien, Sanjay V. Rajopadhye

Proceedings of the 32nd International Conference on Parallel Architectures and Compilation Techniques, 2023

2022

Special Issue on Applied Reconfigurable Computing.

Frank Hannig, Steven Derrien

J. Signal Process. Syst., 2022

SpecHLS: Speculative Accelerator Design Using High-Level Synthesis.

Jean-Michel Gorius, Simon Rokicki, Steven Derrien

IEEE Micro, 2022

Maximal Atomic irRedundant Sets: a Usage-based Dataflow Partitioning Algorithm.

Corentin Ferry, Steven Derrien, Sanjay V. Rajopadhye

CoRR, 2022

Design Exploration of RISC-V Soft-Cores through Speculative High-Level Synthesis.

Jean-Michel Gorius, Simon Rokicki, Steven Derrien

Proceedings of the International Conference on Field-Programmable Technology, 2022

2020

Safe Overclocking for CNN Accelerators Through Algorithm-Level Error Detection.

Thibaut Marty, Tomofumi Yuki, Steven Derrien

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Toward Speculative Loop Pipelining for High-Level Synthesis.

Steven Derrien, Thibaut Marty, Simon Rokicki, Tomofumi Yuki

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Application-Specific Arithmetic in High-Level Synthesis Tools.

Yohann Uguen, Florent de Dinechin, Victor Lezaud, Steven Derrien

ACM Trans. Archit. Code Optim., 2020

2019

Worst-Case Execution-Time-Aware Parallelization of Model-Based Avionics Applications.

Simon Reder, Fabian Kempf, Harald Bucher, Jürgen Becker, Panayiotis Alefragis, Nikolaos S. Voros, Stefanos Skalistis, Steven Derrien, Isabelle Puaut, Oliver Oey, Timo Stripf, Christian Ferdinand, Clément David, Peer Ulbig, David Müller, Umut Durak

J. Aerosp. Inf. Syst., November, 2019

Hybrid-DBT: Hardware/Software Dynamic Binary Translation Targeting VLIW.

Simon Rokicki, Erven Rohou, Steven Derrien

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Reconciling Compiler Optimizations and WCET Estimation Using Iterative Compilation.

Mickaël Dardaillon, Stefanos Skalistis, Isabelle Puaut, Steven Derrien

Proceedings of the IEEE Real-Time Systems Symposium, 2019

Hiding Communication Delays in Contention-Free Execution for SPM-Based Multi-Core Architectures.

Benjamin Rouxel, Stefanos Skalistis, Steven Derrien, Isabelle Puaut

Proceedings of the 31st Euromicro Conference on Real-Time Systems, 2019

Aggressive Memory Speculation in HW/SW Co-Designed Machines.

Simon Rokicki, Erven Rohou, Steven Derrien

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018

Fine-Grain Iterative Compilation for WCET Estimation.

Isabelle Puaut, Mickaël Dardaillon, Christoph Cullmann, Gernot Gebhard, Steven Derrien

Proceedings of the 18th International Workshop on Worst-Case Execution Time Analysis, 2018

Enabling Overclocking Through Algorithm-Level Error Detection.

Thibaut Marty, Tomofumi Yuki, Steven Derrien

Proceedings of the International Conference on Field-Programmable Technology, 2018

Supporting runtime reconfigurable VLIWs cores through dynamic binary translation.

Simon Rokicki, Erven Rohou, Steven Derrien

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Using polyhedral techniques to tighten WCET estimates of optimized code: A case study with array contraction.

Thomas Lefeuvre, Imen Fassi, Christoph Cullmann, Gernot Gebhard, Emin-Koray Kasnakli, Isabelle Puaut, Steven Derrien

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

Foreword to the Special Section on Reconfigurable Computing.

Steven Derrien, Kubilay Atasu, João M. P. Cardoso, Jürgen Becker

J. Signal Process. Syst., 2017

Tightening Contention Delays While Scheduling Parallel Applications on Multi-core Architectures.

Benjamin Rouxel, Steven Derrien, Isabelle Puaut

ACM Trans. Embed. Comput. Syst., 2017

Bridging high-level synthesis and application-specific arithmetic: The case study of floating-point summations.

Yohann Uguen, Florent de Dinechin, Steven Derrien

Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

One size does not fit all: Implementation trade-offs for iterative stencil computations on FPGAs.

Gaël Deest, Tomofumi Yuki, Sanjay V. Rajopadhye, Steven Derrien

Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

A High-Level Synthesis Approach Optimizing Accumulations in Floating-Point Programs Using Custom Formats and Operators.

Yohann Uguen, Florent de Dinechin, Steven Derrien

Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017

Hardware-accelerated dynamic binary translation.

Simon Rokicki, Erven Rohou, Steven Derrien

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Superword level parallelism aware word length optimization.

Ali Hassan El Moussawi, Steven Derrien

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

WCET-aware parallelization of model-based applications for multi-cores: The ARGO approach.

Steven Derrien, Isabelle Puaut, Panayiotis Alefragis, Marcus Bednara, Harald Bucher, Clément David, Yann Debray, Umut Durak, Imen Fassi, Christian Ferdinand, Damien Hardy, Angeliki Kritikakou, Gerard K. Rauwerda, Simon Reder, Martin Sicks, Timo Stripf, Kim Sunesen, Timon D. ter Braak, Nikolaos S. Voros, Jürgen Becker

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016

Communication-Based Power Modelling for Heterogeneous Multiprocessor Architectures.

Baptiste Roux, Matthieu Gautier, Olivier Sentieys, Steven Derrien

Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016

System level synthesis for virtual memory enabled hardware threads.

Nicolas Estibals, Gaël Deest, Ali Hassan El Moussawi, Steven Derrien

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Demo: SLP-aware word length optimization.

Ali Hassan El Moussawi, Steven Derrien

Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016

2015

Combining execution pipelines to improve parallel implementation of HMMER on FPGA.

Naeem Abbas, Steven Derrien, Sanjay V. Rajopadhye, Patrice Quinton, Alexandre Cornu, Dominique Lavenier

Microprocess. Microsystems, 2015

2014

Component reuse methodology for multi-clock Data-Flow parallel embedded Systems.

Anne-Marie Chana, Patrice Quinton, Steven Derrien

ARIMA J., 2014

Toward scalable source level accuracy analysis for floating-point to fixed-point conversion.

Gaël Deest, Tomofumi Yuki, Olivier Sentieys, Steven Derrien

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Low Power Reconfigurable Controllers for Wireless Sensor Network Nodes.

Vivek D. Tovinakere, Olivier Sentieys, Steven Derrien, Christophe Huriaux

Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014

2013

Polyhedral Bubble Insertion: A Method to Improve Nested Loop Pipelining for High-Level Synthesis.

Antoine Morvan, Steven Derrien, Patrice Quinton

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Compiling Scilab to high performance embedded multicore systems.

Timo Stripf, Oliver Oey, Thomas Bruckschlögl, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Steven Derrien, Olivier Sentieys, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Dimitrios Kritharidis, Nikolaos Mitas, Thomas Perschke

Microprocess. Microsystems, 2013

GeCoS: A framework for prototyping custom hardware design flows.

Antoine Floch, Tomofumi Yuki, Ali El Moussawi, Antoine Morvan, Kevin J. M. Martin, Maxime Naullet, Mythri Alle, Ludovic L'Hours, Nicolas Simon, Steven Derrien, François Charot, Christophe Wolinski, Olivier Sentieys

Proceedings of the 13th IEEE International Working Conference on Source Code Analysis and Manipulation, 2013

Derivation of efficient FSM from loop nests.

Tomofumi Yuki, Antoine Morvan, Steven Derrien

Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

Using Model Types to Support Contract-Aware Model Substitutability.

Wuliang Sun, Benoît Combemale, Steven Derrien, Robert B. France

Proceedings of the Modelling Foundations and Applications - 9th European Conference, 2013

Component-Level Datapath Merging in System-Level Design of Wireless Sensor Node Controllers for FPGA-Based Implementations.

Muhammad Adeel Pasha, Steven Derrien, Olivier Sentieys

Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

Runtime dependency analysis for loop pipelining in high-level synthesis.

Mythri Alle, Antoine Morvan, Steven Derrien

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012

System-Level Synthesis for Wireless Sensor Node Controllers: A Complete Design Flow.

Muhammad Adeel Pasha, Steven Derrien, Olivier Sentieys

ACM Trans. Design Autom. Electr. Syst., 2012

Bridging the chasm between MDE and the world of compilation.

Jean-Marc Jézéquel, Benoît Combemale, Steven Derrien, Clément Guy, Sanjay V. Rajopadhye

Softw. Syst. Model., 2012

Efficient hardware implementation of data-flow parallel embedded systems.

Patrice Quinton, Anne-Marie Chana, Steven Derrien

Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

From Scilab to multicore embedded systems: Algorithms and methodologies.

George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Göhringer, Steven Derrien, Daniel Ménard, Olivier Sentieys, Michael Hübner, Timo Stripf, Oliver Oey, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas

Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

A flexible approach for compiling scilab to reconfigurable multi-core embedded systems.

Timo Stripf, Oliver Oey, Thomas Bruckschlögl, Ralf König, Michael Hübner, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Dimitrios Kritharidis, Nikolaos Mitas, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Steven Derrien, Daniel Ménard, Olivier Sentieys, Diana Göhringer, Thomas Perschke

Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012

On Model Subtyping.

Clément Guy, Benoît Combemale, Steven Derrien, Jim Steel, Jean-Marc Jézéquel

Proceedings of the Modelling Foundations and Applications - 8th European Conference, 2012

From Scilab to High Performance Embedded Multicore Systems: The ALMA Approach.

Jürgen Becker, Timo Stripf, Oliver Oey, Michael Hübner, Steven Derrien, Daniel Ménard, Olivier Sentieys, Gerard K. Rauwerda, Kim Sunesen, Nikolaos Kavvadias, Kostas Masselos, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Dimitrios Kritharidis, Nikolaos Mitas, Diana Göhringer

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

A semiempirical model for wakeup time estimation in power-gated logic clusters.

Vivek D. Tovinakere, Olivier Sentieys, Steven Derrien

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

A Compilation- and Simulation-Oriented Architecture Description Language for Multicore Systems.

Timo Stripf, Oliver Oey, Thomas Bruckschlögl, Ralf König, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Jordy Potman, Kim Sunesen, Steven Derrien, Olivier Sentieys, Jürgen Becker

Proceedings of the 15th IEEE International Conference on Computational Science and Engineering, 2012

2011

A Polynomial Based Approach to Wakeup Time and Energy Estimation in Power-Gated Logic Clusters.

Vivek D. Tovinakere, Olivier Sentieys, Steven Derrien

J. Low Power Electron., 2011

Wakeup Time and Wakeup Energy Estimation in Power-Gated Logic Clusters.

Vivek D. Tovinakere, Olivier Sentieys, Steven Derrien

Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011

Model-Driven Engineering and Optimizing Compilers: A Bridge Too Far?

Antoine Floch, Tomofumi Yuki, Clément Guy, Steven Derrien, Benoît Combemale, Sanjay V. Rajopadhye, Robert B. France

Proceedings of the Model Driven Engineering Languages and Systems, 2011

ompVerify: Polyhedral Analysis for the OpenMP Programmer.

V. Basupalli, Tomofumi Yuki, Sanjay V. Rajopadhye, Antoine Morvan, Steven Derrien, Patrice Quinton, David Wonnacott

Proceedings of the OpenMP in the Petascale Era - 7th International Workshop on OpenMP, 2011

Efficient nested loop pipelining in high level synthesis using polyhedral bubble insertion.

Antoine Morvan, Steven Derrien, Patrice Quinton

Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

HLS Tools for FPGA: Faster Development with Better Performance.

Alexandre Cornu, Steven Derrien, Dominique Lavenier

Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2011

Contributions à la conception d'architectures matérielles dédiées.

Steven Derrien

, 2011

2010

Hardware Acceleration of HMMER on FPGAs.

Steven Derrien, Patrice Quinton

J. Signal Process. Syst., 2010

Accelerating HMMER on FPGA using parallel prefixes and reductions.

Naeem Abbas, Steven Derrien, Sanjay V. Rajopadhye, Patrice Quinton

Proceedings of the International Conference on Field-Programmable Technology, 2010

System Level Synthesis for Ultra Low-Power Wireless Sensor Nodes.

Muhammad Adeel Pasha, Steven Derrien, Olivier Sentieys

Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

A complete design-flow for the generation of ultra low-power WSN node architectures based on micro-tasking.

Muhammad Adeel Pasha, Steven Derrien, Olivier Sentieys

Proceedings of the 47th Design Automation Conference, 2010

2009

Ultra Low-power FSM for Control Oriented Applications.

Muhammad Adeel Pasha, Steven Derrien, Olivier Sentieys

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008

Deriving efficient control in Process Networks with Compaan/Laura.

Steven Derrien, Alexandru Turjan, Claudiu Zissulescu, Bart Kienhuis, Ed F. Deprettere

Int. J. Embed. Syst., 2008

2007

Parallelizing HMMER for Hardware Acceleration on FPGAs.

Steven Derrien, Patrice Quinton

Proceedings of the IEEE International Conference on Application-Specific Systems, 2007

Combining Flash Memory and FPGAs to Efficiently Implement a Massively Parallel Algorithm for Content-Based Image Retrieval.

Rayan Chikhi, Steven Derrien, Auguste Noumsi, Patrice Quinton

Proceedings of the Reconfigurable Computing: Architectures, 2007

2006

Acceleration of a content-based image-retrieval application on the RDISK cluster.

Auguste Noumsi, Steven Derrien, Patrice Quinton

Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

2005

Cluster of re-configurable nodes for scanning large genomic banks.

Stéphane Guyetant, Mathieu Giraud, Ludovic L'Hours, Steven Derrien, Stéphane Rubini, Dominique Lavenier, Frédéric Raimbault

Parallel Comput., 2005

Hardware/Software Interface for Multi-Dimensional Processor Arrays.

Alain Darte, Steven Derrien, Tanguy Risset

Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005

2003

A Reconfigurable Parallel Disk System for Filtering Genomic Banks.

Dominique Lavenier, Stéphane Guyetant, Steven Derrien, Stéphane Rubini

Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003

2002

Energy/Power Estimation of Regular Processor Arrays.

Sanjay V. Rajopadhye, Steven Derrien

Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002

2001

Combined instruction and loop parallelism in array synthesis for FPGAs.

Steven Derrien, Sanjay V. Rajopadhye, Susmita Sur-Kolay

Proceedings of the 14th International Symposium on Systems Synthesis, 2001

Loop Tiling for Reconfigurable Accelerators.

Steven Derrien, Sanjay V. Rajopadhye

Proceedings of the Field-Programmable Logic and Applications, 2001

Combining Instruction and Loop Level Parallelism for FPGAs.

Steven Derrien, Sanjay V. Rajopadhye, Susmita Sur-Kolay

Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

2000

Interfacing compiled FPGA programs: the MMAlpha approach.

Steven Derrien, Tanguy Risset

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000

Optimal Partitioning for FPGA Based Regular Array Implementations.

Steven Derrien, Sanjay V. Rajopadhye, Susmita Sur-Kolay

Proceedings of the 2000 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2000), 2000

Approximating a Single Viewpoint in Panoramic Imaging Devices.

Steven Derrien, Kurt Konolige

Proceedings of the 2000 IEEE International Conference on Robotics and Automation, 2000

FCCMS and the Memory Wall.

Steven Derrien, Sanjay V. Rajopadhye

Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000