Simone Erba

According to our database1, Simone Erba authored at least 18 papers between 2008 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
A 14-32 GHz SiGe-BiCMOS Gilbert-Cell Frequency Doubler With Self-Adjusted Reduced Duty-Cycle Performance Enhancement.
IEEE J. Solid State Circuits, March, 2024

2022
A K-band Gilbert-Cell Frequency Doubler with Self-Adjusted 25% LO Duty-Cycle in SiGe BiCMOS Technology.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

2019
A 64 Gb/s Low-Power Transceiver for Short-Reach PAM-4 Electrical Links in 28-nm FDSOI CMOS.
IEEE J. Solid State Circuits, 2019

2018
F5: Advanced optical communication: From devices, circuits, and architectures to algorithms.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

A 4.9pJ/b 16-to-64Gb/s PAM-4 VSR transceiver in 28nm FDSOI CMOS.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017
A 25mW Highly Linear Continuous-Time FIR Equalizer for 25Gb/s Serial Links in 28-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

A 2-11 GHz 7-Bit High-Linearity Phase Rotator Based on Wideband Injection-Locking Multi-Phase Generation for High-Speed Serial Links in 28-nm CMOS FDSOI.
IEEE J. Solid State Circuits, 2017

6.4 A 64Gb/s PAM-4 transmitter with 4-Tap FFE and 2.26pJ/b energy efficiency in 28nm CMOS FDSOI.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

F5: Wireline transceivers for Mega Data Centers: 50Gb/s and beyond.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

Session 6 overview: Ultra-high-speed wireline.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2016
A High-Swing 45 Gb/s Hybrid Voltage and Current-Mode PAM-4 Transmitter in 28 nm CMOS FDSOI.
IEEE J. Solid State Circuits, 2016

Session 23 overview: Electrical and optical link innovations.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

3.6 A 45Gb/s PAM-4 transmitter delivering 1.3Vppd output swing with 1V supply in 28nm CMOS FDSOI.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

A 0.2-11.7GHz, high accuracy injection-locking multi-phase generation with mixed analog/digital calibration loops in 28nm FDSOI CMOS.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

2011
An inductor-less 13.5-Gbps 8-mW analog equalizer for multi-channel multi-frequency operation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010
A 12Gb/s 39dB loss-recovery unclocked-DFE receiver with bi-dimensional equalization.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009
A Multi-Standard 1.5 to 10 Gb/s Latch-Based 3-Tap DFE Receiver With a SSC Tolerant CDR for Serial Backplane Communication.
IEEE J. Solid State Circuits, 2009

2008
A 10Gb/s receiver with linear backplane equalization and mixer-based self-aligned CDR.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008


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