Shigeru Yamashita

Venkata Lavanya Sarvasiddi

Daniel J. Egger

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., November, 2023

Preparing Fluid Samples Under Retention Time Constraints Using Flow-Based Microfluidic Biochips.

[BibT_eX]

[DOI]

Debraj Kundu

Sukanta Bhattacharjee

Sudip Roy

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2023

Making General Dilution Graphs Robust to Unbalanced-Split Errors on Digital Microfluidic Biochips.

[BibT_eX]

[DOI]

Ikuru Yoshida

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., February, 2023

An Efficient Method to Decompose and Map MPMCT Gates That Accounts for Qubit Placement.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., February, 2023

Transport-Free Placement of Mixers for Realizing Bioprotocol on Programmable Microfluidic Devices.

[BibT_eX]

[DOI]

Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023

A Fast Approach to Droplet Routing with Shape-Dependent Velocity on MEDA Biochips.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

A Deep Reinforcement Learning-based Routing Algorithm for Unknown Erroneous Cells in DMFBs.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

Using S Gates and Relative Phase Toffoli Gates to Improve T-Count in Quantum Boolean Circuits.

[BibT_eX]

[DOI]

David Clarino

Shohei Kuroda

Proceedings of the 53rd IEEE International Symposium on Multiple-Valued Logic, 2023

Optimizing LUT-Based Quantum Circuit Synthesis Using Relative Phase Boolean Operations.

[BibT_eX]

[DOI]

David Clarino

Naoya Asada

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

Multi-Droplet Routing based on a Shape-Dependent Velocity Model on MEDA Biochips.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Electronics, Information, and Communication, 2023

Minimizing the Impact of Unbalanced Splitting Errors on DMFBs Without Any Overhead.

[BibT_eX]

[DOI]

Yuji Wada

Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

An SMT-Solver-Based Synthesis of NNA-Compliant Quantum Circuits Consisting of CNOT, H and T Gates.

[BibT_eX]

[DOI]

Kyohei Seino

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022

Mixer-Based Washing Methods for Programmable Microfluidic Devices.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., October, 2022

Approximating stochastic numbers to reduce latency.

[BibT_eX]

[DOI]

Syoki Kawaminami

Yukino Watanabe

it Inf. Technol., 2022

Shape-Dependent Velocity Based Droplet Routing on MEDA Biochips.

[BibT_eX]

[DOI]

IEEE Access, 2022

Optimization of Quantum Boolean Circuits by Relative-Phase Toffoli Gates.

[BibT_eX]

[DOI]

Shohei Kuroda

Proceedings of the Reversible Computation - 14th International Conference, 2022

2021

Fluid-to-cell assignment and fluid loading on programmable microfluidic devices for bioprotocol execution.

[BibT_eX]

[DOI]

Integr., 2021

A Multiply Accumulator for Stochastic Numbers Without Scaling Errors.

[BibT_eX]

[DOI]

Katsuhiro Ichikawa

Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

Triple-Rail Stochastic Number and Its Applications.

[BibT_eX]

[DOI]

Shoki Kawaminami

Proceedings of the 18th International SoC Design Conference, 2021

Design for Restricted-Area and Fast Dilution using Programmable Microfluidic Device based Lab-on-a-Chip.

[BibT_eX]

[DOI]

Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

Minimization of Routing Area in MEDA Biochips.

[BibT_eX]

[DOI]

Proceedings of the IEEE Biomedical Circuits and Systems Conference, BioCAS 2021, 2021

Dynamical Decomposition and Mapping of MPMCT Gates to Nearest Neighbor Architectures.

[BibT_eX]

[DOI]

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020

Exact Synthesis of Nearest Neighbor Compliant Quantum Circuits in 2-D Architecture and Its Application to Large-Scale Circuits.

[BibT_eX]

[DOI]

Jingwen Ding

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Efficient Methods to Generate Constant SNs with Considering Trade-Off between Error and Overhead and Its Evaluation.

[BibT_eX]

[DOI]

Yudai Sakamoto

IEICE Trans. Inf. Syst., 2020

Editorial for the special issue on disruptive computing technologies.

[BibT_eX]

[DOI]

CCF Trans. High Perform. Comput., 2020

Reducing T-count When Decomposing Many MPMCT Gates Simultaneously.

[BibT_eX]

[DOI]

Soma Esaki

Proceedings of the 50th IEEE International Symposium on Multiple-Valued Logic, 2020

Transport-Free Module Binding for Sample Preparation using Microfluidic Fully Programmable Valve Arrays.

[BibT_eX]

[DOI]

Gautam Choudhary

Sandeep Pal

Debraj Kundu

Sukanta Bhattacharjee

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Optimization of Fluid Loading on Programmable Microfluidic Devices for Bio-protocol Execution.

[BibT_eX]

[DOI]

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019

Design Automation for Dilution of a Fluid Using Programmable Microfluidic Device-Based Biochips.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2019

Threshold Function Identification by Redundancy Removal and Comprehensive Weight Assignments.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Mapping a Quantum Circuit to 2D Nearest Neighbor Architecture by Changing the Gate Order.

[BibT_eX]

[DOI]

IEICE Trans. Inf. Syst., 2019

Compaction of Topological Quantum Circuits by Modularization.

[BibT_eX]

[DOI]

Kota Asai

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2019

Reducing the Overhead of Stochastic Number Generators Without Increasing Error.

[BibT_eX]

[DOI]

Yudai Sakamoto

Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

Reactant Minimization for Multi-Target Sample Preparation on Digital Microfluidic Biochips Using Network Flow Models.

[BibT_eX]

[DOI]

Kang-Yi Fan

Juinn-Dar Huang

Proceedings of the International Symposium on VLSI Design, Automation and Test, 2019

An Efficient Method for Quantum Circuit Placement Problem on a 2-D Grid.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 11th International Conference, 2019

Maximum Error-Aware Design of Approximate Array Multipliers.

[BibT_eX]

[DOI]

Proceedings of the 2019 International SoC Design Conference, 2019

Reducing the Overhead of Mapping Quantum Circuits to IBM Q System.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018

Logical Qubit Layout Problem for ICM Representation.

[BibT_eX]

[DOI]

J. Inf. Process., 2018

Quantum Circuit Optimization by Changing the Gate Order for 2D Nearest Neighbor Architectures.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - 10th International Conference, 2018

2017

Microfluidic Biochips: Bridging Biochemistry with Computer Science and Engineering (NII Shonan Meeting 2017-1).

[BibT_eX]

[DOI]

Robert Wille

Krishnendu Chakrabarty

NII Shonan Meet. Rep., 2017

A Systematic Methodology for Design and Worst-Case Error Analysis of Approximate Array Multipliers.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017

Stochastic Number Generation with the Minimum Inputs.

[BibT_eX]

[DOI]

Ritsuko Muguruma

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017

Reduction of Quantum Cost by Making Temporary Changes to the Function.

[BibT_eX]

[DOI]

Alan Mishchenko

IEICE Trans. Inf. Syst., 2017

2016

A Full-Flexibility-Guaranteed Pin-Count Reduction Design for General-Purpose Digital Microfluidic Biochips.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2016

Area/latency optimized early output asynchronous full adders and relative-timed ripple carry adders.

[BibT_eX]

[DOI]

P. Balasubramanian

CoRR, 2016

Quantum Query Complexity of Almost All Functions with Fixed On-set Size.

[BibT_eX]

[DOI]

Comput. Complex., 2016

ILP-based Synthesis for Sample Preparation Applications on Digital Microfluidic Biochips.

[BibT_eX]

[DOI]

Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

Stochastic Number Generation with Few Inputs.

[BibT_eX]

[DOI]

Ritsuko Muguruma

Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

Design of Microfluidic Biochips: Connecting Algorithms and Foundations of Chip Design to Biochemistry and the Life Sciences.

[BibT_eX]

[DOI]

Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

A pre-optimization technique to generate initial reversible circuits with low quantum cost.

[BibT_eX]

[DOI]

Kouhei Kushida

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Effect of LFSR seeding, scrambling and feedback polynomial on stochastic computing accuracy.

[BibT_eX]

[DOI]

Jason Helge Anderson

Yuko Hara-Azumi

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

A systematic methodology for design and analysis of approximate array multipliers.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

2015

An Optimal Pin-Count Design With Logic Optimization for Digital Microfluidic Biochips.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

A general testing method for digital microfluidic biochips under physical constraints.

[BibT_eX]

[DOI]

Krishnendu Chakrabarty

Proceedings of the 2015 IEEE International Test Conference, 2015

Testing of digital microfluidic biochips with arbitrary layouts.

[BibT_eX]

[DOI]

Krishnendu Chakrabarty

Proceedings of the 20th IEEE European Test Symposium, 2015

2014

An Energy-Efficient Patchable Accelerator and Its Design Methods.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014

2D Qubit Layout Optimization for Topological Quantum Computation.

[BibT_eX]

[DOI]

Simon J. Devitt

Kae Nemoto

Proceedings of the Reversible Computation - 6th International Conference, 2014

Better-Than-DMR Techniques for Yield Improvement.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014

A logic integrated optimal pin-count design for digital microfluidic biochips.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

A network-flow-based optimal sample preparation algorithm for digital microfluidic biochips.

[BibT_eX]

[DOI]

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013

Tensor Rank and Strong Quantum Nondeterminism in Multiparty Communication.

[BibT_eX]

[DOI]

IEICE Trans. Inf. Syst., 2013

Clique-Based Architectural Synthesis of Flow-Based Microfluidic Biochips.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013

Selective Check of Data-Path for Effective Fault Tolerance.

[BibT_eX]

[DOI]

IEICE Trans. Inf. Syst., 2013

On the Error Resiliency of Combinational Logic Cells - Implications for Nano-based Digital Design.

[BibT_eX]

[DOI]

P. Balasubramanian

Proceedings of the IEEE 19th Pacific Rim International Symposium on Dependable Computing, 2013

A clique-based approach to find binding and scheduling result in flow-based microfluidic biochips.

[BibT_eX]

[DOI]

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012

Synthesis of Semi-Classical Quantum Circuits.

[BibT_eX]

[DOI]

D. Michael Miller

J. Multiple Valued Log. Soft Comput., 2012

Quantum Walks on the Line with Phase Parameters.

[BibT_eX]

[DOI]

IEICE Trans. Inf. Syst., 2012

Reconstructing Strings from Substrings with Quantum Queries.

[BibT_eX]

[DOI]

Proceedings of the Algorithm Theory - SWAT 2012, 2012

A redundant wire addition method for Patchable Accelerator.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

An Optimization Problem for Topological Quantum Computation.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE Asian Test Symposium, 2012

On error tolerance and Engineering Change with Partially Programmable Circuits.

[BibT_eX]

[DOI]

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011

An efficient conversion of quantum circuits to a linear nearest neighbor architecture.

[BibT_eX]

[DOI]

Quantum Inf. Comput., 2011

Changing the Gate Order for Optimal LNN Conversion.

[BibT_eX]

[DOI]

Proceedings of the Reversible Computation - Third International Workshop, 2011

An efficient algorithm for constructing a Sequence Binary Decision Diagram representing a set of reversed sequences.

[BibT_eX]

[DOI]

Hiroshi Aoki

Proceedings of the 2011 IEEE International Conference on Granular Computing, 2011

2010

Fast equivalence - checking for quantum circuits.

[BibT_eX]

[DOI]

Igor L. Markov

Quantum Inf. Comput., 2010

2009

Synthesis of quantum circuits for d-level systems by using cosine-sine decomposition.

[BibT_eX]

[DOI]

Quantum Inf. Comput., 2009

Multi-Party Quantum Communication Complexity with Routed Messages.

[BibT_eX]

[DOI]

Seiichiro Tani

Masaki Nakanishi

IEICE Trans. Inf. Syst., 2009

Average/Worst-Case Gap of Quantum Query Complexities by On-Set Size

[BibT_eX]

[DOI]

CoRR, 2009

2008

DDMF: An Efficient Decision Diagram Structure for Design Verification of Quantum Circuits under a Practical Restriction.

[BibT_eX]

[DOI]

D. Michael Miller

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

A Functional Unit with Small Variety of Highly Reliable Cells.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE Pacific Rim International Symposium on Dependable Computing, 2008

Quantum Query Complexity of Boolean Functions with Small On-Sets.

[BibT_eX]

[DOI]

Proceedings of the Algorithms and Computation, 19th International Symposium, 2008

Polynomial-Time Construction of Linear Network Coding.

[BibT_eX]

[DOI]

Proceedings of the Automata, Languages and Programming, 35th International Colloquium, 2008

An efficient verification of quantum circuits under a practical restriction.

[BibT_eX]

[DOI]

D. Michael Miller

Proceedings of 8th IEEE International Conference on Computer and Information Technology, 2008

2007

Improved algorithms for quantum identification of Boolean oracles.

[BibT_eX]

[DOI]

Theor. Comput. Sci., 2007

Robust Quantum Algorithms Computing OR with epsilon-Biased Oracles.

[BibT_eX]

[DOI]

IEICE Trans. Inf. Syst., 2007

Unbounded-Error Classical and Quantum Communication Complexity.

[BibT_eX]

[DOI]

Proceedings of the Algorithms and Computation, 18th International Symposium, 2007

Unbounded-Error One-Way Classical and Quantum Communication Complexity.

[BibT_eX]

[DOI]

Proceedings of the Automata, Languages and Programming, 34th International Colloquium, 2007

A practical framework to utilize quantum search.

[BibT_eX]

[DOI]

Masaki Nakanishi

Proceedings of the IEEE Congress on Evolutionary Computation, 2007

A Hardware SAT Solver Using Non-chronological Backtracking and Clause Recording Without Overheads.

[BibT_eX]

[DOI]

Proceedings of the Reconfigurable Computing: Architectures, 2007

2006

Quantum lower bounds for the Goldreich-Levin problem.

[BibT_eX]

[DOI]

Inf. Process. Lett., 2006

An Efficient and Effective Algorithm for Online Task Placement with I/O Communications in Partially Reconfigurable FPGAs.

[BibT_eX]

[DOI]

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

(4, 1)-Quantum Random Access Coding Does Not Exist.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2006 IEEE International Symposium on Information Theory, 2006

Quantum Network Coding.

[BibT_eX]

[DOI]

Proceedings of the Complexity of Boolean Functions, 12.03. - 17.03.2006, 2006

Robust Quantum Algorithms with <i>epsilon</i>-Biased Oracles.

[BibT_eX]

[DOI]

Proceedings of the Computing and Combinatorics, 12th Annual International Conference, 2006

A New Approach to Online FPGA Placement.

[BibT_eX]

[DOI]

Proceedings of the 40th Annual Conference on Information Sciences and Systems, 2006

A transduction-based framework to synthesize RSFQ circuits.

[BibT_eX]

[DOI]

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005

SPFD-Based Flexible Transformation of LUT-Based FPGA Circuits.

[BibT_eX]

[DOI]

Katsunori Tanaka

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

Quantum Sampling for Balanced Allocations.

[BibT_eX]

[DOI]

Kazuo Iwama

Akinori Kawachi

IEICE Trans. Inf. Syst., 2005

Reconfigurable 1-Bit Processor Array with Reduced Wirng Area.

[BibT_eX]

Proceedings of The 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, 2005

Event-oriented computing with reconfigurable platform.

[BibT_eX]

[DOI]

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

Quantum Identification of Boolean Oracles.

[BibT_eX]

[DOI]

Proceedings of the STACS 2004, 2004

SPFD-based effective one-to-many rewiring (OMR) for delay reduction of LUT-based FPGA circuits.

[BibT_eX]

[DOI]

Katsunori Tanaka

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

SPFD-based one-to-many rewiring.

[BibT_eX]

[DOI]

Katsunori Tanaka

Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004

2003

Efficient Algorithms for NMR Quantum Computers with Small Qubits.

[BibT_eX]

[DOI]

Noboru Kunihiro

New Gener. Comput., 2003

Transformation Rules for CNOT-based Quantum Circuits and Their Applications.

[BibT_eX]

[DOI]

Kazuo Iwama

New Gener. Comput., 2003

2002

Transformation rules for designing CNOT-based quantum circuits.

[BibT_eX]

[DOI]

Kazuo Iwama

Proceedings of the 39th Design Automation Conference, 2002

2000

SPFD: A new method to express functional flexibility.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

An efficient framework of using various decomposition methods to synthesize LUT networks and its evaluation.

[BibT_eX]

[DOI]

Proceedings of ASP-DAC 2000, 2000

1999

An Integrated Approach for Synthesizing LUT Networks.

[BibT_eX]

[DOI]

Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

1998

Restructuring Logic Representations with Easily Detectable Simple Disjunctive Decompositions.

[BibT_eX]

[DOI]

Proceedings of the 1998 Design, 1998

New Methods to Find Optimal Non-Disjoint Bi-Decompositions.

[BibT_eX]

[DOI]

Proceedings of the ASP-DAC '98, 1998

1997

Restricted Simple Disjunctive Decompositions Based on Grouping Symmetric Variables.

[BibT_eX]

[DOI]

Proceedings of the 7th Great Lakes Symposium on VLSI (GLS-VLSI '97), 1997

1996

Optimization methods for look-up table-type FPGAs based on permissible functions.

[BibT_eX]

[DOI]

Saburo Muroga

Syst. Comput. Jpn., 1996

Design of logic circuits with wired-logic utilizing transduction method.

[BibT_eX]

[DOI]

Saburo Muroga

Syst. Comput. Jpn., 1996

A new method to express functional permissibilities for LUT based FPGAs and its applications.

[BibT_eX]

[DOI]

Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

1995

Optimization methods for lookup-table-based FPGAs using transduction method.

[BibT_eX]

[DOI]