Sergiu Nimara

According to our database1, Sergiu Nimara authored at least 9 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Low-Cost Internet-of-Things Water-Quality Monitoring System for Rural Areas.
Sensors, 2023

Bluetooth Sensor Module for Monitoring Indoor Ambient.
Proceedings of the 17th IEEE International Symposium on Applied Computational Intelligence and Informatics, 2023

2019
Reference Images Generation for Automotive Regression Testing.
Proceedings of the 23rd International Conference on System Theory, Control and Computing, 2019

Reliability Assessment of Flooded Min-Sum LDPC Decoders Based on Sub-Threshold Processing Units.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2018
Memory-Centric Flooded LDPC Decoder Architecture Using Non-surjective Finite Alphabet Iterative Decoding.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

2016
Reliability analysis of memory centric LDPC decoders under probabilistic storage failures.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

FPGA architecture of multi-codeword LDPC decoder with efficient BRAM utilization.
Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016

2015
Sub-threshold CMOS circuits reliability assessment using simulated fault injection based on simulator commands.
Proceedings of the 10th IEEE Jubilee International Symposium on Applied Computational Intelligence and Informatics, 2015

2014
Probabilistic Gate Level Fault Modeling for Near and Sub-Threshold CMOS Circuits.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014


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