Samantak Gangopadhyay

According to our database, Samantak Gangopadhyay authored at least 11 papers between 2014 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2020

A Quad-Output Elastic Switched Capacitor Converter and Per-Core LDO with 87% Power Efficiency and 2.5× Core-Frequency Range Improvement.

Samantak Gangopadhyay, James W. Tschanz, Arijit Raychowdhury

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

A 7nm Leakage-Current-Supply Circuit for LDO Dropout Voltage Reduction.

Keith A. Bowman, Samantak Gangopadhyay, Francois Atallah, Hoan Nguyen, Jihoon Jeong, Daniel Yingling, Anthony Polomik, Mahesh Harinath, Nathaniel Reeves, Amer Cassier, Brad Appel, Arijit Raychowdhury

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

Efficient Signal Reconstruction via Distributed Least Square Optimization on a Systolic FPGA Architecture.

Muya Chang, Samantak Gangopadhyay, Tomer Hamam, Justin Romberg, Arijit Raychowdhury

Proceedings of the IEEE International Conference on Acoustics, 2019

2018

A FeFET Based Processing-In-Memory Architecture for Solving Distributed Least-Square Optimizations.

Insik Yoon, Muya Chang, Kai Ni, Matthew Jerry, Samantak Gangopadhyay, Gus Henry Smith, Tomer Hamam, Vijayakrishan Narayanan, Justin Romberg, Shih-Lien Lu, Suman Datta, Arijit Raychowdhury

Proceedings of the 76th Device Research Conference, 2018

2017

Digitally-assisted leakage current supply circuit for reducing the analog LDO minimum dropout voltage.

Samantak Gangopadhyay, Saad Bin Nasir, Hoan Nguyen, Jihoon Jeong, Francois Atallah, Keith A. Bowman, Arijit Raychowdhury

Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016

UVFR: A Unified Voltage and Frequency Regulator with 500MHz/0.84V to 100KHz/0.27V operating range, 99.4% current efficiency and 27% supply guardband reduction.

Samantak Gangopadhyay, Saad Bin Nasir, A. Subramanian, Visvesh Sathe, Arijit Raychowdhury

Proceedings of the ESSCIRC Conference 2016: 42^nd European Solid-State Circuits Conference, 2016

2015

5.6 A 0.13μm fully digital low-dropout regulator with adaptive control and reduced dynamic stability for ultra-wide dynamic range.

Saad Bin Nasir, Samantak Gangopadhyay, Arijit Raychowdhury

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

Integrated power management in IoT devices under wide dynamic ranges of operation.

Samantak Gangopadhyay, Saad Bin Nasir, Arijit Raychowdhury

Proceedings of the 52nd Annual Design Automation Conference, 2015

2014

A 32 nm Embedded, Fully-Digital, Phase-Locked Low Dropout Regulator for Fine Grained Power Management in Digital Circuits.

Samantak Gangopadhyay, Dinesh Somasekhar, James W. Tschanz, Arijit Raychowdhury

IEEE J. Solid State Circuits, 2014

The role of adaptation and resiliency in computation and power management.

Arijit Raychowdhury, Saad Bin Nasir, Samantak Gangopadhyay

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Modeling and analysis of digital linear dropout regulators with adaptive control for high efficiency under wide dynamic range digital loads.

Samantak Gangopadhyay, Youngtak Lee, Saad Bin Nasir, Arijit Raychowdhury

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014