Roman Golman

Orcid: 0000-0002-1215-5603

According to our database1, Roman Golman authored at least 11 papers between 2018 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2023
A Low-Complexity Sensing Scheme for Approximate Matching Content-Addressable Memory.
IEEE Trans. Circuits Syst. II Express Briefs, October, 2023

2022
Hamming Distance Tolerant Content-Addressable Memory (HD-CAM) for DNA Classification.
IEEE Access, 2022

A RISC-V-based Research Platform for Rapid Design Cycle.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
Hamming Distance Tolerant Content-Addressable Memory (HD-CAM) for Approximate Matching Applications.
CoRR, 2021

Refresh Algorithm for Ensuring 100% Memory Availability in Gain-Cell Embedded DRAM Macros.
IEEE Access, 2021

4T Gain-Cell Providing Unlimited Availability through Hidden Refresh with 1W1R Functionality.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Gain-Cell Embedded DRAMs: Modeling and Design Space.
IEEE Trans. Very Large Scale Integr. Syst., 2020

Improved Read Access in GC-eDRAM Memory by Dual-Negative Word-Line Technique.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
Improving Energy-Efficiency in Dynamic Memories Through Retention Failure Detection.
IEEE Access, 2019

2018
Live Demonstration: An 800 Mhz Gain-Cell Embedded DRAM in 28 nm CMOS Bulk Process for Approximate Computing Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Configurable Multi-Port Dynamic Bitcell with Internal Refresh Mechanism.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018


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