Robert Kunzelmann

According to our database1, Robert Kunzelmann authored at least 5 papers between 2023 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
The Argument for Meta-Modeling-Based Approaches to Hardware Generation Languages.
CoRR, 2024

Fake Timer: An Engine for Accurate Timing Estimation in Register Transfer Level Designs.
Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

2023
CPU to FPGA Power Covert Channel in FPGA-SoCs.
IACR Cryptol. ePrint Arch., 2023

Effective Processor Model Generation from Instruction Set Simulator to Hardware Design.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2023

Modelling Peripheral Designs using FSM-like Notation for Complete Property Set Generation.
Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023


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