Rajasekhar Nagulapalli

According to our database, Rajasekhar Nagulapalli authored at least 27 papers between 2010 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

A Novel Bias Circuit Technique to Reduce the PVT Variation of the Ring Oscillator Frequency.

Ravi Kumar, Rajasekhar Nagulapalli, Santosh Kumar Vishvakarma

J. Circuits Syst. Comput., March, 2023

Dynamic Averager Based Sub-1V Bandgap Voltage Reference.

Rakesh Kumar Palani, Rajasekhar Nagulapalli, Srikar Bhagavatula

Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

2022

A Novel Sub-1V Bandgap Reference with 17.1 ppm/⁰C Temperature coefficient in 28nm CMOS.

Rajasekhar Nagulapalli, Khaled Hayatleh, Nabil Yassine, S. Barker

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

A 24.4 ppm/°C Voltage Mode Bandgap Reference With a 1.05V Supply.

Rajasekhar Nagulapalli, Rakesh Kumar Palani, Srikar Bhagavatula

IEEE Trans. Circuits Syst. II Express Briefs, 2021

A 82μW Mixed-Mode sub-1V Bandgap reference with 25 ppm/°C Temperature Co-efficient with Simultaneous PTAT Generation.

T. R. Varun, Rajasekhar Nagulapalli, Immanuel Raja

Proceedings of the 25th International Symposium on VLSI Design and Test, 2021

A Novel 22.7 ppm/⁰C Voltage mode Sub-Bandgap Reference with robust startup nature.

Rajasekhar Nagulapalli, Rakesh Kumar Palani

Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

8.7 A 112Gb/s ADC-DSP-Based PAM-4 Transceiver for Long-Reach Applications with >40dB Channel Loss in 7nm FinFET.

P. Mishra, A. Tan, Belal Helal, Cheng-Ru Ho, C. Loi, Jamal Riani, J. Sun, Kaizad Mistry, Karthik Raviprakash, L. Tse, M. Davoodi, M. Takefman, N. Fan, P. Prabha, Q. Liu, Q. Wang, Rajasekhar Nagulapalli, S. Cyrusian, S. Jantzi, S. Scouten, T. Dusatko, T. Setya, V. Giridharan, V. Gurumoorthy, Victor Karam, W. Liew, Y. Liao, Y. Ou

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

A 15uW, 12 ppm/^°C Curvature Compensated Bandgap in 0.85V Supply.

Rajasekhar Nagulapalli, Rakesh Kumar Palani, Sweta Agarwal, Shouri Chatterjee, K. Hayatleh, S. Barker

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

A High-Sensitivity and Low-Power Circuit for the Measurement of Abnormal Blood Cell Levels.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Amr A. Tammam, F. John Lidgey, Nabil Yassine

J. Circuits Syst. Comput., 2020

A Positive Feedback-Based Op-Amp Gain Enhancement Technique for High-Precision Applications.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker

J. Circuits Syst. Comput., 2020

A VGA Linearity Improvement Technique for ECG Analog Front-End in 65nm CMOS.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker

J. Circuits Syst. Comput., 2020

A two-stage opamp frequency Compensation technique by splitting the 2^nd stage.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, B. Naresh Kumar Reddy

Proceedings of the 11th International Conference on Computing, 2020

A Single BJT 10.2 ppm/°C Bandgap Reference in 45nm CMOS Technology.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, B. Naresh Kumar Reddy

Proceedings of the 11th International Conference on Computing, 2020

2019

A Start-up Assisted Fully Differential Folded Cascode Opamp.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Bilal Yassine, Saddam Zourob, Sumathi Raparthy, Nabil Yassine

J. Circuits Syst. Comput., 2019

A Low Noise Amplifier Suitable for Biomedical Recording Analog Front-End in 65nm CMOS Technology.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Amr A. Tammam, Nabil Yassine, Bilal Yassine, Mohamed Ben-Esmael

J. Circuits Syst. Comput., 2019

A 0.55 V Bandgap Reference with a 59 ppm/°C Temperature Coefficient.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Amr A. Tammam, Pantelis Georgiou, F. J. Lidgey

J. Circuits Syst. Comput., 2019

A High Value, Linear and Tunable CMOS Pseudo-Resistor for Biomedical Applications.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Pantelis Georgiou, F. J. Lidgey

J. Circuits Syst. Comput., 2019

A CMOS Self-Bias CTAT Current Generator with Improved Supply Sensitivity.

Rajasekhar Nagulapalli

J. Circuits Syst. Comput., 2019

A High-Performance Skin Impedance Measurement Circuit for Biomedical Applications.

Khaled Hayatleh, Saddam Zourob, Rajasekhar Nagulapalli, Steve Barker, Nabil Yassine, Pantelis Georgiou, F. J. Lidgey

J. Circuits Syst. Comput., 2019

A High Frequency CMRR improvement technique for Differential Amplifiers in 45nm CMOS.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, B. Naresh Kumar Reddy, B. Seetharamulu

Proceedings of the 10th International Conference on Computing, 2019

A Low Power Miller Compensation Technique for Two Stage Op-amp in 65nm CMOS Technology.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, B. Naresh Kumar Reddy, B. Seetharamulu

Proceedings of the 10th International Conference on Computing, 2019

2018

A 0.6 V MOS-Only Voltage Reference for Biomedical Applications with 40 ppm/∘C Temperature Drift.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Sumathi Raparthy, Nabil Yassine, John Lidgey

J. Circuits Syst. Comput., 2018

A 31 ppm/° C Pure CMOS Bandgap Reference by Exploiting Beta-Multiplier.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Saddam Zourob, Nabil Yassine, B. Naresh Kumar Reddy

Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018

High Performance Circuit Techniques for Nueral Front-End Design in 65nm CMOS.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Saddam Zourob, Nabil Yassine, B. Naresh Kumar Reddy

Proceedings of the 9th International Conference on Computing, 2018

A Technique to Reduce the Capacitor Size in Two Stage Miller Compensated Opamp.

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Saddam Zourob, Nabil Yassine, B. Naresh Kumar Reddy

Proceedings of the 9th International Conference on Computing, 2018

2016

23.5 A dual 64Gbaud 10kΩ 5% THD linear differential transimpedance amplifier with automatic gain control in 0.13µm BiCMOS technology for optical fiber coherent receivers.

Ahmed Awny, Rajasekhar Nagulapalli, Daniel Micusik, Jan Hoffmann, Gunter Fischer, Dietmar Kissinger, Ahmet Cagri Ulusoy

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2010

High Speed Clock and Data Recovery Circuit with Novel Jitter Reduction Technique.

Kunal Desai, Rajasekhar Nagulapalli, Vijay Krishna, Rajkumar Palwai, Pravin Kumar Venkatesan, Vijay Khawshe

Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010