Philippe Bénabès

Gérard Sou

João Alberto de França Ferreira

Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

2020

Design of integrated all-pass filters with linear group delay for analog signal processing applications.

[BibT_eX]

[DOI]

Julien Sarrazin

Int. J. Circuit Theory Appl., 2020

A CMOS readout circuit for a low shunt resistance IR photo-detector.

[BibT_eX]

[DOI]

Saman Fatima

Mohamed Ben Chouikha

Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

2019

A new algorithm for an incremental sigma-delta converter reconstruction filter.

[BibT_eX]

[DOI]

Li Huang

João Alberto de França Ferreira

Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019

2018

Design and Synthesis of Arbitrary Group Delay Filters for Integrated Analog Signal Processing.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017

A 14-b two-step inverter-based ΣΔ ADC for CMOS image sensor.

[BibT_eX]

[DOI]

Pierre Bisiaux

Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017

Analog bandwidth mismatch compensation for time-interleaved ADCs using FD-SOI technology.

[BibT_eX]

[DOI]

Alexandre Mas

Eric Andre

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Delay estimation and measurement circuit for a high-speed CMOS clocked comparator.

[BibT_eX]

[DOI]

L. Cron

P. Laugier

Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017

2016

A new two-step ΣΔ architecture column-parallel ADC for CMOS image sensor.

[BibT_eX]

[DOI]

Pierre Bisiaux

Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

2015

Optimization Methodology for a 460-MHz-GBW and 80-dB-SNR Low-Power Current-Mode Amplifier.

[BibT_eX]

[DOI]

Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015

2014

Mismatch calibration methods for high-speed time-interleaved ADCs.

[BibT_eX]

[DOI]

Nicolas Le Dortz

Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

22.5 A 1.62GS/s time-interleaved SAR ADC with digital background mismatch calibration achieving interleaving spurs below 70dBFS.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013

High-loop-delay sixth-order bandpass continuoustime Sigma-Delta modulators.

[BibT_eX]

[DOI]

Mohammad Javidan

Jérôme Juillard

IET Circuits Devices Syst., 2013

A design methodology for delta-sigma converters based on solid-state passive filters.

[BibT_eX]

[DOI]

Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

A Nano quiescent Current Power Management for Autonomous Wireless Sensor Network.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE International Conference on Electronics, 2013

2012

Efficient optimization methodology for CT functions based on a modified bayesian kriging approach.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2011

Generalized multi-stage closed loop sigma delta modulator.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Effective modeling of CT functions for fast simulations using MATLAB-Simulink and VHDLAMS applied to Sigma-Delta architectures.

[BibT_eX]

[DOI]

Catalin-Adrian Tugui

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Optimization of bandpass charge sampling filters in hybrid filter banks converters for cognitive radio applications.

[BibT_eX]

[DOI]

Alban Gruget

Morgan Roger

Van Tam Nguyen

Patrick Loumeau

Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

2010

Synthesis of Subband Hybrid Filter Banks ADCs with finite word-length coefficients using adaptive equalization.

[BibT_eX]

[DOI]

Zhiguo Song

Daniel Poulton

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009

Accurate Time-Domain Simulation of Continuous-Time Sigma-Delta Modulators.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

Synthesis of complex subband Hybrid Filter Banks A/D converters using adaptive filters.

[BibT_eX]

[DOI]

Zhiguo Song

Proceedings of the 16th IEEE International Conference on Electronics, 2009

Adaptive equalization for calibration of subband hybrid filter banks A/D converters.

[BibT_eX]

[DOI]

Zhiguo Song

Daniel Poulton

Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

Completely first order and tone free partitioned data weighted averaging technique used in a multibit delta sigma modulator.

[BibT_eX]

[DOI]

Javad Abbasszadeh

Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

2008

Fixed-step simulation of Continuous-Time SigmaDelta modulators.

[BibT_eX]

[DOI]

Ali Beydoun

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Band-pass continuous-time delta-sigma modulators employing LWR resonators.

[BibT_eX]

[DOI]

Mohammad Javidan

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007

A Sigma-Delta Converter with Adjustable Tradeoff between Resolution and Consumption.

[BibT_eX]

[DOI]

Sylvie Guessab

Proceedings of the 14th IEEE International Conference on Electronics, 2007

2006

A hardware efficient 3-bit second-order dynamic element matching circuit clocked at 300MHz.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Bandpass / wideband ADC architecture using parallel delta sigma modulators.

[BibT_eX]

[DOI]

Ali Beydoun

Proceedings of the 14th European Signal Processing Conference, 2006

2005

Higher order dynamic element matching by shortened tree-structure in delta-sigma modulators.

[BibT_eX]

[DOI]

Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

2003

A parallel structure of a continuous-time filter for band-pass sigma-delta A/D converters.

[BibT_eX]

[DOI]

Jean-Luc De Gouy

Richard Kielbasa

Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

A Manchester code generator running at 1 GHz.

[BibT_eX]

[DOI]

Alain Gauthier

Jacques Oksman

Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

A new mixed stable DEM algorithm for bandpass multibit delta sigma ADC.

[BibT_eX]

[DOI]

Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

2001

Bandpass Delta-Sigma modulators synthesis with high loop delay.

[BibT_eX]

[DOI]

Abdeljalil Yahias

Richard Kielbasa

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

1999

Design of an optoelectronic crossbar based on 0.6 μm CMOS process with a 1 Tbit/s optical input.

[BibT_eX]

[DOI]

Marc P. Y. Desmulliez

A. C. Walker

Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

1997

A methodology for designing continuous-time sigma-delta modulators.

[BibT_eX]

[DOI]