Pavan Yelleswarapu

According to our database, Pavan Yelleswarapu authored at least 4 papers between 2018 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

A 10-Gb/s 180-GHz Phase-Locked-Loop Minimum Shift Keying Receiver.

Shenggang Dong, Ibukunoluwa Momson, Sandeep Kshattry, Pavan Yelleswarapu, Wooyeol Choi, Kenneth K. O

IEEE J. Solid State Circuits, 2021

2020

315-GHz Self-Synchronizing Minimum Shift Keying Receiver in 65-nm CMOS.

Ibukunoluwa Momson, Shenggang Dong, Pavan Yelleswarapu, Wooyeol Choi, Kenneth K. O

Proceedings of the IEEE Symposium on VLSI Circuits, 2020

A Wideband 180-GHz Phase-Lacked-Loop Based MSK Receiver.

Shenggang Dong, Ibukunoluwa Momson, Sandeep Kshattry, Pavan Yelleswarapu, Wooyeol Choi, Kenneth K. O

Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2018

CMOS terahertz receivers.

Qian Zhong, Wooyeol Choi, Dae Yeon Kim, Zeshan Ahmad, Rui Xu, Yaming Zhang, Ruonan Han, Sandeep Kshattry, Navneet Sharma, Z.-Y. Chen, Dongha Shim, Swaminathan Sankaran, Eunyoung Seok, Chuying Mao, Frank C. De Lucia, James P. McMillan, Christopher F. Neese, Insoo Kim, Ibukunoluwa Momson, Pavan Yelleswarapu, Shenggang Dong, Behnam Pouya, Pranith R. Byreddy, Z. Chen, Yukun Zhu, Suprovo Ghosh, Toan Dinh, Farzaneh Jalalibidgoli, J. Newman, Kenneth K. O

Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018