Mohammad Rahmani Fadiheh

Orcid: 0000-0003-0214-2486

According to our database1, Mohammad Rahmani Fadiheh authored at least 18 papers between 2018 and 2024.

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Bibliography

2024
Data-Oblivious and Performant: On Designing Security-Conscious Hardware.
Proceedings of the 25th IEEE Latin American Test Symposium, 2024

2023
An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors.
IEEE Trans. Computers, 2023

Okapi: A Lightweight Architecture for Secure Speculation Exploiting Locality of Memory Accesses.
CoRR, 2023

A Golden-Free Formal Method for Trojan Detection in Non-Interfering Accelerators.
CoRR, 2023

A New Security Threat in MCUs - SoC-wide timing side channels and how to find them.
CoRR, 2023

A Scalable Formal Verification Methodology for Data-Oblivious Hardware.
CoRR, 2023

Fault Attacks on Access Control in Processors: Threat, Formal Analysis and Microarchitectural Mitigation.
IEEE Access, 2023

Design of Access Control Mechanisms in Systems-on-Chip with Formal Integrity Guarantees.
Proceedings of the 32nd USENIX Security Symposium, 2023

Secure-by-Construction Design Methodology for CPUs: Implementing Secure Speculation on the RTL.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

2022
Unique Program Execution Checking: A Novel Approach for Formal Security Analysis of Hardware.
PhD thesis, 2022

Towards a formally verified hardware root-of-trust for data-oblivious computing.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
Effective Pre-Silicon Verification of Processor Cores by Breaking the Bounds of Symbolic Quick Error Detection.
CoRR, 2021

A Formal Approach to Confidentiality Verification in SoCs at the Register Transfer Level.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
Gap-free Processor Verification by S<sup>2</sup>QED and Property Generation.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

A Formal Approach for Detecting Vulnerabilities to Transient Execution Attacks in Out-of-Order Processors.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Processor Hardware Security Vulnerabilities and their Detection by Unique Program Execution Checking.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Symbolic quick error detection using symbolic initial state for pre-silicon verification.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018


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