Mini Jayakrishnan

According to our database, Mini Jayakrishnan authored at least 4 papers between 2011 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

Library pruning and sigma corner libraries for power efficient variation tolerant processor pipelines.

Mini Jayakrishnan, Alan Chang, Tony T. Kim

Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017

2016

Power and area efficient clock stretching and critical path reshaping for error resilience.

Mini Jayakrishnan, Alan Chang, Tae-Hyoung Kim

Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

2015

Slack-aware timing margin redistribution technique utilizing error avoidance flip-flops and time borrowing.

Mini Jayakrishnan, Alan Chang, José Pineda de Gyvez, Tae-Hyoung Kim

Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015

2011

A miniaturized heterogeneous wireless sensor node in 3DIC.

Xin Liu, Lei Wang, Mini Jayakrishnan, Jingjing Lan, Hongyu Li, Chong Ser Choong, M. Kumarasamy Raja, Yongxin Guo, Wang Ling Goh, Jin He, Shan Gao, Minkyu Je

Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011