Michael M. Green

Orcid: 0000-0003-4134-1875

Affiliations:
  • University of California at Irvine, CA, USA
  • Stony Brook University, New York, NY, USA (former)


According to our database1, Michael M. Green authored at least 73 papers between 1993 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Online presence:

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Bibliography

2023
Asynchronous Sampling-Based Hybrid Equalizer.
IEEE Trans. Very Large Scale Integr. Syst., 2023

A Digitally-Controlled Integrated Circuit Solution for Tinnitus Treatment with Charge Balancing.
Proceedings of the 45th Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2023

2022
Low Phase Noise Oscillator Design Using Degenerate Band Edge Ladder Architectures.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

2021
DC-DC Boost Converter for Wireless Power Transfer Systems.
Proceedings of the 12th IEEE Annual Ubiquitous Computing, 2021

2020
A Rigorous Analysis on Quadrature Single-Ended Ring Oscillators.
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

2019
A Low-Power 8-GS/s Comparator for High-Speed Analog-to-Digital Conversion in $0.13\mu$ m CMOS Technology.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

New oscillator concept based on band edge degeneracy in lumped double-ladder circuits.
IET Circuits Devices Syst., 2019

A Radiation Hard Sense Circuit for Spin Transfer Torque Random Access Memory.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
A Silicon-Based Low-Power Broadband Transimpedance Amplifier.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

TIA Linearity Analysis for Current Mode Receivers.
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018

2017
Fast Startup of LC VCOs Using Circuit Asymmetries.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

A 30 $\mu\text{W}$ Remotely Powered Local Temperature Monitoring Implantable System.
IEEE Trans. Biomed. Circuits Syst., 2017

An LC voltage-controlled oscillator with supply sensitivity compensation method.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

2Vrms 16Ω switching headphone driver with 82% peak efficiency, 102 dB SNDR and 1.1mA/channel quiescent current.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Asychnronous sampling based hybrid equalizer.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
Capacitive and Inductive TSV-to-TSV Resilient Approaches for 3D ICs.
IEEE Trans. Computers, 2016

A precise 360°-range phase detector based on an N-path filter.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

A half-rate 100 Gb/s injection-locked clock/data recovery circuit.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

A 0.3 nJ/bit super-regenerative pulse UWB receiver with track and detection.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

2015
An 8.2 Gb/s-to-10.3 Gb/s Full-Rate Linear Referenceless CDR Without Frequency Detector in 0.18 μm CMOS.
IEEE J. Solid State Circuits, 2015

A precise 360°-range phase detector for fdNIRS application using a pair of XNORs.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

A 2 × 50-Gb/s receiver with adaptive channel loss equalization and far-end crosstalk cancellation.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Noise analysis for time-domain circuits.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A 30 μW remotely-powered implant with time-based voltage regulation.
Proceedings of the ESSCIRC Conference 2015, 2015

2014
A 15 µW 5.5 kS/s Resistive Sensor Readout Circuit with 7.6 ENOB.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

8.8 An 8.2-to-10.3Gb/s full-rate linear reference-less CDR without frequency detector in 0.18μm CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013
Design of CML Ring Oscillators With Low Supply Sensitivity.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

Non-idealities in linear CDR phase detectors.
Int. J. Circuit Theory Appl., 2013

2011
Power Optimization of an 11.75-Gb/s Combined Decision Feedback Equalizer and Clock Data Recovery Circuit in 0.18-μm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

A 0.24-nJ/bit Super-Regenerative Pulsed UWB Receiver in 0.18- μ m CMOS.
IEEE J. Solid State Circuits, 2011

Fast startup of LC VCOs using circuit asymmetries.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

Nonlinearities in frequency dividers.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

CMOS latch based on a class-AB transconductor.
Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

2010
An 80 mW 40 Gb/s 7-Tap T/2-Spaced Feed-Forward Equalizer in 65 nm CMOS.
IEEE J. Solid State Circuits, 2010

Use of a continuation method for analyzing startup circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A 10 Gb/s adaptive analog decision feedback equalizer for multimode fiber dispersion compensation in 0.13 µm CMOS.
Proceedings of the 36th European Solid-State Circuits Conference, 2010

High-speed CMOS ring oscillators with low supply sensitivity.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009
A 40Gb/s full-rate 2: 1 MUX in 0.18µm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

An 80mW 40Gb/s 7-Tap T/2-Spaced FFE in 65nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2008
The effect of noise propagation on phase noise in ring oscillators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Design methodology for CMOS distributed amplifiers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
Building Blocks for High-Speed Transceivers.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

All-CMOS High-Speed CML Gates with Active Shunt-Peaking.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

An 11.75-Gb/s combined decision feedback equalizer and clock data recovery circuit in 0.18-μm CMOS.
Proceedings of the 33rd European Solid-State Circuits Conference, 2007

2006
Design of CMOS Ternary Latches.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006

A 34 Gb/s Distributed 2: 1 MUX and CMU Using 0.18$muhbox m$CMOS.
IEEE J. Solid State Circuits, 2006

Phase noise in dual inverter-based CMOS ring oscillators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
A method for automatically finding multiple operating points in nonlinear circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005

A 10 Gb/s BiCMOS adaptive cable equalizer.
IEEE J. Solid State Circuits, 2005

High-frequency CML clock dividers in 0.13-μm CMOS operating up to 38 GHz.
IEEE J. Solid State Circuits, 2005

2004
A CMOS 10 Gb/s clock and data recovery circuit with a novel adjustable K<sub>pd</sub> phase detector.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003
A BiCMOS 10Gb/s adaptive cable equalizer.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Design of CMOS CML circuits for high-speed broadband communications.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
OC-192 transmitter and receiver in standard 0.18-μm CMOS.
IEEE J. Solid State Circuits, 2002

2001
A fully integrated SONET OC-48 transceiver in standard CMOS.
IEEE J. Solid State Circuits, 2001

A methodology for constructing two-transistor multistable circuits.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

A programmable VHF CMOS read-channel continuous-time filter with on-chip tuning.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

A family of CMOS latches with 3 stable operating points.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000
A 1.5 V CMOS VGA based on pseudo-differential structures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

Using continuation methods to improve convergence of circuits with high impedance nodes.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
Some standard SPICE dc algorithms revisited: why does SPICE still not converge?
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Some two-transistor circuits possess more than three operating points.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Applying Globally Convergent Techniques to Conventional DC Operating Point Analyses.
Proceedings of the Proceedings 32nd Annual Simulation Symposium (SS '99), 1999

1998
New CMOS universal constant-Gm input stage.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

1996
A tunable pulse-shaping filter for use in a nuclear spectrometer system.
IEEE J. Solid State Circuits, 1996

1995
An algorithm for identifying unstable operating points using SPICE.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

A Loser-Take-All Error Amplifier for DC Power Supply Control.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

Sufficient Conditions for Finding Multiple Operating Points for CD Circuits Using Continuation Methods.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

A Method for Identifying Combinations of Transistors that can be Replaced with a Single Transistor when Applying the Nielsen-Willson Theorem.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994
A Novel Transconductance Block Eliminates the Need for Common-Mode Feedback in Fully Differential Circuits.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

A Current-Mode FDNR Circuit Element using Capacitive Gyrators.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993
A Monolithic Pulse-shaping Filter for Measurement of Radiation Particles.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

On the relationship between negatve differential resistance and stability for nonlinear one-ports.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993


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