Masataka Matsui

According to our database1, Masataka Matsui authored at least 13 papers between 1994 and 2007.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2007
Content-Based Complexity Reduction Methods for MPEG-2 to H.264 Transcoding.
IEICE Trans. Inf. Syst., 2007

2006
A Hardware Implementation of a Content-Based Motion Estimation Algorithm for Real-Time MPEG-4 Video Coding.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

Complexity Based Fast Coding Mode Decision for MPEG-2 / H.264 Video Transcoding.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005
Development of Image Recognition Processor Based on Configurable Processor.
J. Robotics Mechatronics, 2005

DSP for wireless.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2003
A single-chip MPEG-2 codec based on customizable media embedded processor.
IEEE J. Solid State Circuits, 2003

Visconti: multi-VLIW image recognition processor based on configurable processor [obstacle detection applications].
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002
Design Methodology and System for a Configurable Media Embedded Processor Extensible to VLIW Architecture.
Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

A single-chip MPEG-2 codec based on customizable media microprocessor.
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2000
Energy-efficient 32 × 32-bit multiplier in tunable near-zero threshold CMOS.
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000

Repeater insertion method and its application to a 300MHz 128-bit 2-way superscalar microprocessor.
Proceedings of ASP-DAC 2000, 2000

1994
A 200 MHz 13 mm<sup>2</sup> 2-D DCT macrocell using sense-amplifying pipeline flip-flop scheme.
IEEE J. Solid State Circuits, December, 1994

A 110-MHz/1-Mb synchronous TagRAM.
IEEE J. Solid State Circuits, April, 1994


  Loading...