Mahmoud Reza Ahmadi

According to our database, Mahmoud Reza Ahmadi authored at least 10 papers between 2006 and 2015.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2015

A 40 nm CMOS 195 mW/55 mW Dual-Path Receiver AFE for Multi-Standard 8.5-11.5 Gb/s Serial Links.

Bo Zhang, Ali Nazemi, Adesh Garg, Namik Kocaman, Mahmoud Reza Ahmadi, Mehdi Khanpour, Heng Zhang, Jun Cao, Afshin Momtaz

IEEE J. Solid State Circuits, 2015

2014

A 23mW/lane 1.2-6.8Gb/s multi-standard transceiver in 28nm CMOS.

Seong-Ho Lee, Duke Tran, Tamer A. Ali, Burak Çatli, Heng Zhang, Wei Zhang, Mohammed M. Abdul-Latif, Zhi Huang, Guansheng Li, Mahmoud Reza Ahmadi, Afshin Momtaz

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

2013

A 195mW / 55mW dual-path receiver AFE for multistandard 8.5-to-11.5 Gb/s serial links in 40nm CMOS.

Bo Zhang, Ali Nazemi, Adesh Garg, Namik Kocaman, Mahmoud Reza Ahmadi, Mehdi Khanpour, Heng Zhang, Jun Cao, Afshin Momtaz

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

A Sub-200 fs RMS jitter capacitor multiplier loop filter-based PLL in 28 nm CMOS for high-speed serial communication applications.

Burak Çatli, Ali Nazemi, Tamer A. Ali, Siavash Fallahi, Yang Liu, Jaehyup Kim, Mohammed M. Abdul-Latif, Mahmoud Reza Ahmadi, Hassan Maarefi, Afshin Momtaz, Namik Kocaman

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2010

A 5 Gbps 0.13 μ m CMOS Pilot-Based Clock and Data Recovery Scheme for High-Speed Links.

Mahmoud Reza Ahmadi, Amir Amirkhany, Ramesh Harjani

IEEE J. Solid State Circuits, 2010

2009

A 5Gbps 0.13μm CMOS pilot-based clock and data recovery scheme for high-speed links.

Mahmoud Reza Ahmadi, Amir Amirkhany, Ramesh Harjani

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008

A 3, times, 5-Gb/s Multilane Low-Power 0.18-muhbox m CMOS Pseudorandom Bit Sequence Generator.

Kin-Joe Sham, Shubha Bommalingaiahnapallya, Mahmoud Reza Ahmadi, Ramesh Harjani

IEEE Trans. Circuits Syst. II Express Briefs, 2008

Constrained Partial Response Receivers for High-Speed Links.

Mahmoud Reza Ahmadi, Jaekyun Moon, Ramesh Harjani

IEEE Trans. Circuits Syst. II Express Briefs, 2008

2007

High-Speed Circuits for a Multi-Lane 12 Gbps CMOS PRBS Generator.

Shubha Bommalingaiahnapallya, Kin-Joe Sham, Mahmoud Reza Ahmadi, Ramesh Harjani

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006

FEXT Crosstalk Cancellation for High-Speed Serial Link Design.

Kin-Joe Sham, Mahmoud Reza Ahmadi, S. B. Gerry Talbot, Ramesh Harjani

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006