Justin Emile Gottschlich

Orcid: 0000-0003-2742-9205

According to our database1, Justin Emile Gottschlich authored at least 40 papers between 2008 and 2022.

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Bibliography

2022
Machine Programming: Turning Data into Programmer Productivity.
Proc. VLDB Endow., 2022

Synthesizing Programs with Continuous Optimization.
CoRR, 2022

MP-CodeCheck: Evolving Logical Expression Code Anomaly Learning with Iterative Self-Supervision.
CoRR, 2022

2021
Simulation Intelligence: Towards a New Generation of Scientific Methods.
CoRR, 2021

Toward Code Generation: A Survey and Lessons from Semantic Parsing.
CoRR, 2021

Predictive data locality optimization for higher-order tensor computations.
Proceedings of the MAPS@PLDI 2021: Proceedings of the 5th ACM SIGPLAN International Symposium on Machine Programming, 2021

ControlFlag: a self-supervised idiosyncratic pattern detection system for software control structures.
Proceedings of the MAPS@PLDI 2021: Proceedings of the 5th ACM SIGPLAN International Symposium on Machine Programming, 2021

Learning Fitness Functions for Machine Programming.
Proceedings of Machine Learning and Systems 2021, 2021

AI programmer: autonomously creating software programs using genetic algorithms.
Proceedings of the GECCO '21: Genetic and Evolutionary Computation Conference, 2021

2020
Class-Weighted Evaluation Metrics for Imbalanced Data Classification.
CoRR, 2020

MISIM: An End-to-End Neural Code Similarity System.
CoRR, 2020

Software Language Comprehension using a Program-Derived Semantic Graph.
CoRR, 2020

Context-Aware Parse Trees.
CoRR, 2020

Learned garbage collection.
Proceedings of the 4th ACM SIGPLAN International Workshop on Machine Learning and Programming Languages, 2020

An Abstraction-Based Framework for Neural Network Verification.
Proceedings of the Computer Aided Verification - 32nd International Conference, 2020

2019
NetSyn: Neural Evolutionary Technique to Synthesize Programs.
CoRR, 2019

SysML: The New Frontier of Machine Learning Systems.
CoRR, 2019

A Zero-Positive Learning Approach for Diagnosing Software Performance Regressions.
Proceedings of the Advances in Neural Information Processing Systems 32: Annual Conference on Neural Information Processing Systems 2019, 2019

2018
The Three Pillars of Machine-Based Programming.
CoRR, 2018

A New Model for Evaluating Range-Based Anomaly Detection Algorithms.
CoRR, 2018

Toward Scalable Verification for Safety-Critical Deep Networks.
CoRR, 2018

Precision and Recall for Range-Based Anomaly Detection.
CoRR, 2018

Greenhouse: A Zero-Positive Machine Learning System for Time-Series Anomaly Detection.
CoRR, 2018

Paranom: A Parallel Anomaly Dataset Generator.
CoRR, 2018

The three pillars of machine programming.
Proceedings of the 2nd ACM SIGPLAN International Workshop on Machine Learning and Programming Languages, 2018

Precision and Recall for Time Series.
Proceedings of the Advances in Neural Information Processing Systems 31: Annual Conference on Neural Information Processing Systems 2018, 2018

2017
AutoCon: Regression Testing for Detecting Cache Contention Anomalies Using Autoencoder.
CoRR, 2017

2015
TSXProf: Profiling Hardware Transactions.
Proceedings of the 2015 International Conference on Parallel Architectures and Compilation, 2015

2014
Towards Transactional Memory for OpenMP.
Proceedings of the Using and Improving OpenMP for Devices, Tasks, and More, 2014

Invyswell: a hybrid transactional memory for haswell's restricted transactional memory.
Proceedings of the International Conference on Parallel Architectures and Compilation, 2014

2013
QuickRec: prototyping an intel architecture extension for record and replay of multithreaded programs.
Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013

But How Do We Really Debug Transactional Memory Programs?
Proceedings of the 5th USENIX Workshop on Hot Topics in Parallelism, 2013

Using Elimination and Delegation to Implement a Scalable NUMA-Friendly Stack.
Proceedings of the 5th USENIX Workshop on Hot Topics in Parallelism, 2013

Concurrent predicates: A debugging technique for every parallel programmer.
Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques, 2013

2012
Visualizing transactional memory.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

2011
CoreRacer: a practical memory race recorder for multicore x86 TSO processors.
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011

Optimizing the Concurrent Execution of Locks and Transactions.
Proceedings of the Languages and Compilers for Parallel Computing, 2011

2010
An efficient software transactional memory using commit-time invalidation.
Proceedings of the CGO 2010, 2010

2009
An efficient lock-aware transactional memory implementation.
Proceedings of the 4th workshop on the Implementation, 2009

2008
Optimizing consistency checking for memory-intensive transactions.
Proceedings of the Twenty-Seventh Annual ACM Symposium on Principles of Distributed Computing, 2008


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