Joseph L. Greathouse

According to our database1, Joseph L. Greathouse authored at least 29 papers between 2008 and 2023.

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Bibliography

2023

2019
Tangram: Integrated Control of Heterogeneous Computers.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

2018
clARMOR: A Dynamic Buffer Overflow Detector for OpenCL Kernels.
Proceedings of the International Workshop on OpenCL, 2018

Interference from GPU System Service Requests.
Proceedings of the 2018 IEEE International Symposium on Workload Characterization, 2018

Machine learning for performance and power modeling of heterogeneous systems.
Proceedings of the International Conference on Computer-Aided Design, 2018

2017

Dynamic GPGPU Power Management Using Adaptive Model Predictive Control.
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

Dynamic buffer overflow detection for GPGPUs.
Proceedings of the 2017 International Symposium on Code Generation and Optimization, 2017

Accelerating Matrix Processing with GPUs.
Proceedings of the 24th IEEE Symposium on Computer Arithmetic, 2017

DVFS Space Exploration in Power Constrained Processing-in-Memory Systems.
Proceedings of the Architecture of Computing Systems - ARCS 2017, 2017

2016
Horton Tables: Fast Hash Tables for In-Memory Data-Intensive Computing.
Proceedings of the 2016 USENIX Annual Technical Conference, 2016

clSPARSE: A Vendor-Optimized Open-Source Sparse BLAS Library.
Proceedings of the 4th International Workshop on OpenCL, 2016

Measuring and modeling on-chip interconnect power on real hardware.
Proceedings of the 2016 IEEE International Symposium on Workload Characterization, 2016

2015
Adaptive GPU cache bypassing.
Proceedings of the 8th Workshop on General Purpose Processing using GPUs, 2015

A Taxonomy of GPGPU Performance Scaling.
Proceedings of the 2015 IEEE International Symposium on Workload Characterization, 2015

GPGPU performance and power estimation using machine learning.
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

Structural Agnostic SpMV: Adapting CSR-Adaptive for Irregular Matrices.
Proceedings of the 22nd IEEE International Conference on High Performance Computing, 2015

2014
Implementing a Leading Loads Performance Predictor on Commodity Processors.
Proceedings of the 2014 USENIX Annual Technical Conference, 2014

Efficient Sparse Matrix-Vector Multiplication on GPUs Using the CSR Storage Format.
Proceedings of the International Conference for High Performance Computing, 2014

PPEP: Online Performance, Power, and Energy Prediction Framework and DVFS Space Exploration.
Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014

TOP-PIM: throughput-oriented programmable processing in memory.
Proceedings of the 23rd International Symposium on High-Performance Parallel and Distributed Computing, 2014

2013
A new perspective on processing-in-memory architecture design.
Proceedings of the ACM SIGPLAN Workshop on Memory Systems Performance and Correctness, 2013

2012
Hardware Mechanisms for Distributed Dynamic Software Analysis.
PhD thesis, 2012

Viper: Virtual pipelines for enhanced reliability.
Proceedings of the 39th International Symposium on Computer Architecture (ISCA 2012), 2012

A case for unlimited watchpoints.
Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems, 2012

2011
The potential of sampling for dynamic analysis.
Proceedings of the 2011 Workshop on Programming Languages and Analysis for Security, 2011

Demand-driven software race detection using hardware performance counters.
Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011

Highly scalable distributed dataflow analysis.
Proceedings of the CGO 2011, 2011

2008
Testudo: Heavyweight security analysis via statistical sampling.
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008


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