Hans Giesen

According to our database, Hans Giesen authored at least 9 papers between 2015 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Meta-level issues in Offloading: Scoping, Composition, Development, and their Automation.

André DeHon, Hans Giesen, Nik Sultana, Yuanlong Xiao

CoRR, 2021

Flightplan: Dataplane Disaggregation and Placement for P4 Programs.

Nik Sultana, John Sonchack, Hans Giesen, Isaac Pedisich, Zhaoyang Han, Nishanth Shyamkumar, Shivani Burad, André DeHon, Boon Thau Loo

Proceedings of the 18th USENIX Symposium on Networked Systems Design and Implementation, 2021

2019

Reducing FPGA Compile Time with Separate Compilation for FPGA Building Blocks.

Yuanlong Xiao, Dongjoon Park, Andrew Butt, Hans Giesen, Zhaoyang Han, Rui Ding, Nevo Magnezi, Raphael Rubin, André DeHon

Proceedings of the International Conference on Field-Programmable Technology, 2019

2018

Continuous Online Self-Monitoring Introspection Circuitry for Timing Repair by Incremental Partial-Reconfiguration (COSMIC TRIP).

Hans Giesen, Benjamin Gojman, Raphael Rubin, Ji Kim, André DeHon

ACM Trans. Reconfigurable Technol. Syst., 2018

In-network computing to the rescue of faulty links.

Hans Giesen, Lei Shi, John Sonchack, Anirudh Chelluri, Nishanth Prabhu, Nik Sultana, Latha A. Kant, Anthony J. McAuley, Alexander Poylisher, André DeHon, Boon Thau Loo

Proceedings of the 2018 Morning Workshop on In-Network Computing, 2018

2017

Self-Adaptive Timing Repair.

Hans Giesen, Raphael Rubin, Benjamin Gojman, André DeHon

IEEE Des. Test, 2017

Quality-Time Tradeoffs in Component-Specific Mapping: How to Train Your Dynamically Reconfigurable Array of Gates with Outrageous Network-delays.

Hans Giesen, Raphael Rubin, Benjamin Gojman, André DeHon

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

2015

A 3.5mW 315/400MHz IEEE802.15.6/proprietary mode digitally-tunable radio SoC with integrated digital baseband and MAC processor in 40nm CMOS.

Christian Bachmann, Maja Vidojkovic, Xiongchuan Huang, Maarten Lont, Yao-Hong Liu, Ming Ding, Benjamin Busze, Jordy Gloudemans, Hans Giesen, Adnane Sbai, Gert-Jan van Schaik, Nauman F. Kiyani, Kouichi Kanda, Kazuaki Oishi, Shoichi Masui, Kathleen Philips, Harmke de Groot

Proceedings of the Symposium on VLSI Circuits, 2015

13.2 A 3.7mW-RX 4.4mW-TX fully integrated Bluetooth Low-Energy/IEEE802.15.4/proprietary SoC with an ADPLL-based fast frequency offset compensation in 40nm CMOS.

Yao-Hong Liu, Christian Bachmann, Xiaoyan Wang, Yan Zhang, Ao Ba, Benjamin Busze, Ming Ding, Pieter Harpe, Gert-Jan van Schaik, Georgios N. Selimis, Hans Giesen, Jordy Gloudemans, Adnane Sbai, Li Huang, Hiromu Kato, Guido Dolmans, Kathleen Philips, Harmke de Groot

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015