Graeme Coapes

According to our database, Graeme Coapes authored at least 8 papers between 2012 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Requirements for ultra-high frequency partial discharge monitoring systems for gas-insulated switchgear.

Wojciech Koltunowicz, Glenn Behrmann, Matthias Boltze, Andrea Caprara, Graeme Coapes, Fraser Cook, Hiroyuki Hama, Thomas Huecker, Carl Johnstone, Stefan Neuhold, Claus Neumann, Shinya Ohtsuka, Jean-Francois Penning, Uwe Riechert, Toshiaki Rokunohe, Uwe Schichler, Markus Soeller, Takanori Yasouka

Elektrotech. Informationstechnik, February, 2023

2021

PD Signal Attenuation in 550-kV GIS: Impact of Different Barriers on the Propagation of Electromagnetic Waves.

Ahmad Darwish, Graeme Coapes, Shady S. Refaat, Haitham Abu-Rub, Hamid A. Toliyat

IEEE Trans. Instrum. Meas., 2021

2016

Neural networks-on-chip for hybrid bio-electronic systems.

Graeme Coapes

PhD thesis, 2016

Real-Time Simulation of Passage-of-Time Encoding in Cerebellum Using a Scalable FPGA-Based System.

Junwen Luo, Graeme Coapes, Terrence S. T. Mak, Tadashi Yamazaki, Chung Tin, Patrick Degenaar

IEEE Trans. Biomed. Circuits Syst., 2016

2014

A real-time silicon cerebellum spiking neural model based on FPGA.

Junwen Luo, Graeme Coapes, Patrick Degenaar, Tadashi Yamazaki, Terrence S. T. Mak, Chung Tin

Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

A scalable FPGA-based cerebellum for passage-of-time representation.

Junwen Luo, Graeme Coapes, Terrence S. T. Mak, Tadashi Yamazaki, Chung Tin, Patrick Degenaar

Proceedings of the 36th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2014

2013

Towards reliable hybrid bio-silicon integration using novel adaptive control system.

Junwen Luo, Patrick Degenaar, Graeme Coapes, Alex Yakovlev, Terrence S. T. Mak, Peter Andras

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012

A scalable FPGA-based design for field programmable large-scale ion channel simulations.

Graeme Coapes, Terrence S. T. Mak, Junwen Luo, Alex Yakovlev, Chi-Sang Poon

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012