Gordon J. Brebner

According to our database, Gordon J. Brebner authored at least 56 papers between 1981 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Blockchain Machine: A Network-Attached Hardware Accelerator for Hyperledger Fabric.

Haris Javaid, Ji Yang, Nathania Santoso, Mohit Upadhyay, Sundararajarao Mohan, Chengchen Hu, Gordon J. Brebner

Proceedings of the 42nd IEEE International Conference on Distributed Computing Systems, 2022

2020

Adaptable Switch: A Heterogeneous Switch Architecture for Network-Centric Computing.

Siyi Qiao, Chengchen Hu, Gordon J. Brebner, Jianhua Zou, Xiaohong Guan

IEEE Commun. Mag., 2020

2019

Optimizing Validation Phase of Hyperledger Fabric.

Haris Javaid, Chengchen Hu, Gordon J. Brebner

Proceedings of the 27th IEEE International Symposium on Modeling, 2019

Event-Driven Packet Processing.

Stephen Ibanez, Gianni Antichi, Gordon J. Brebner, Nick McKeown

Proceedings of the 18th ACM Workshop on Hot Topics in Networks, 2019

The P4->NetFPGA Workflow for Line-Rate Packet Processing.

Stephen Ibanez, Gordon J. Brebner, Nick McKeown, Noa Zilberman

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

FastProxy: Hardware and Software Acceleration of Stratum Mining Proxy.

Guanwen Zhong, Haris Javaid, Hassaan Saadat, Lingchao Xu, Chengchen Hu, Gordon J. Brebner

Proceedings of the Crypto Valley Conference on Blockchain Technology, 2019

2017

Whippersnapper: A P4 Language Benchmark Suite.

Huynh Tu Dang, Han Wang, Theo Jepsen, Gordon J. Brebner, Changhoon Kim, Jennifer Rexford, Robert Soulé, Hakim Weatherspoon

Proceedings of the Symposium on SDN Research, 2017

2015

Programmable hardware for high performance SDN.

Gordon J. Brebner

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2015

Programmable hardware in software defined networking.

Gordon J. Brebner

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2015

Programmable hardware for software defined networks.

Gordon J. Brebner

Proceedings of the European Conference on Optical Communication, 2015

2014

High-Speed Packet Processing using Reconfigurable Computing.

Gordon J. Brebner, Weirong Jiang

IEEE Micro, 2014

2013

ReShape: Towards a High-Level Approach to Design and Operation of Modular Reconfigurable Systems.

Christopher E. Neely, Gordon J. Brebner, Weijia Shang

ACM Trans. Reconfigurable Technol. Syst., 2013

2012

Optimizing packet lookup in time and space on FPGA.

Thilan Ganegedara, Viktor K. Prasanna, Gordon J. Brebner

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

Softly defined networking.

Gordon J. Brebner

Proceedings of the Symposium on Architecture for Networking and Communications Systems, 2012

2011

Reconfigurable Computing for High Performance Networking Applications.

Gordon J. Brebner

Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2011

400 Gb/s Programmable Packet Parsing on a Single FPGA.

Michael Attig, Gordon J. Brebner

Proceedings of the 2011 ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), 2011

2010

Flexible and Modular Support for Timing Functions in High Performance Networking Acceleration.

Christopher E. Neely, Gordon J. Brebner, Weijia Shang

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

ShapeUp: A High-Level Design Approach to Simplify Module Interconnection on FPGAs.

Christopher E. Neely, Gordon J. Brebner, Weijia Shang

Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010

2009

Packets everywhere: The great opportunity for field programmable technology.

Gordon J. Brebner

Proceedings of the 2009 International Conference on Field-Programmable Technology, 2009

2008

OpenDF: a dataflow toolset for reconfigurable hardware and multicore systems.

Shuvra S. Bhattacharyya, Gordon J. Brebner, Jörn W. Janneck, Johan Eker, Carl von Platen, Marco Mattavelli, Mickaël Raulet

SIGARCH Comput. Archit. News, 2008

2007

Editorial for the Special Issue on Field Programmable Technology.

Gordon J. Brebner, Samarjit Chakraborty, Weng-Fai Wong

J. VLSI Signal Process., 2007

2006

Micro-Coded Datapaths: Populating the Space Between Finite State Machine and Processor.

Chidamber Kulkarni, Gordon J. Brebner

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Building a flexible and scalable DRAM interface for networking applications on FPGAs.

Jike Chong, Chidamber Kulkarni, Gordon J. Brebner

Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, 2006

Systematic Characterization of Programmable Packet Processing Pipelines.

Michael Attig, Gordon J. Brebner

Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

Memory centric thread synchronization on platform FPGAs.

Chidamber Kulkarni, Gordon J. Brebner

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

06141 Abstracts Collection -- Dynamically Reconfigurable Architectures.

Jürgen Becker, Jürgen Teich, Gordon J. Brebner, Peter M. Athanas

Proceedings of the Dynamically Reconfigurable Architectures, 02.04. - 07.04.2006, 2006

06141 Executive Summary -- Dynamically Reconfigurable Architectures.

Jürgen Becker, Jürgen Teich, Gordon J. Brebner, Peter M. Athanas

Proceedings of the Dynamically Reconfigurable Architectures, 02.04. - 07.04.2006, 2006

2005

Mutable Codesign for Embedded Protocol Processing.

Todd S. Sproull, Gordon J. Brebner, Christopher E. Neely

Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

2004

Programming a hyper-programmable architecture for networked systems.

Eric Keller, Gordon J. Brebner

Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

Multithreading in a Hyper-programmable Platform for Networked Systems.

Philip James-Roxby, Gordon J. Brebner

Proceedings of the Field Programmable Logic and Application, 2004

Programmable Logic Has More Computational Power than Fixed Logic.

Gordon J. Brebner

Proceedings of the Field Programmable Logic and Application, 2004

Time-Critical Software Deceleration in an FCCM.

Philip James-Roxby, Gordon J. Brebner, Dennis Bemmann

Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004

Mapping a domain specific language to a platform FPGA.

Chidamber Kulkarni, Gordon J. Brebner, Graham Schelle

Proceedings of the 41th Design Automation Conference, 2004

Hyper-Programmable Architectures for Adaptable Networked Systems.

Gordon J. Brebner, Philip James-Roxby, Eric Keller, Chidamber Kulkarni

Proceedings of the 15th IEEE International Conference on Application-Specific Systems, 2004

2003

Networking on chip with platform FPGAs.

Gordon J. Brebner, Delon Levi

Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, 2003

Software Decelerators.

Eric Keller, Gordon J. Brebner, Philip James-Roxby

Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Eccentric SoC Architectures as the Future Norm.

Gordon J. Brebner

Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003

2002

Workshop Introduction.

Gordon J. Brebner

Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002

Multithreading for Logic-Centric Systems.

Gordon J. Brebner

Proceedings of the Field-Programmable Logic and Applications, 2002

Single-Chip Gigabit Mixed-Version IP Router on Virtex-II Pro.

Gordon J. Brebner

Proceedings of the 10th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2002), 2002

2001

Chip-Based Reconfigurable Task Management.

Gordon J. Brebner, Oliver Diessel

Proceedings of the Field-Programmable Logic and Applications, 2001

Circlets: Circuitry over the Internet.

Gordon J. Brebner, Irwin Kennedy

Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

1999

A Transactional Approach to Configuring Telecommunications Services.

Tim Kempster, Gordon J. Brebner, Peter Thanisch

Proceedings of the Databases in Telecommunications, 1999

Reconfigurable Computing in Remote and Harsh Environments.

Gordon J. Brebner, Neil W. Bergmann

Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

1998

Runtime Reconfigurable Routing.

Gordon J. Brebner, Adam Donlin

Proceedings of the Parallel and Distributed Processing, 10 IPPS/SPDP'98 Workshops Held in Conjunction with the 12th International Parallel Processing Symposium and 9th Symposium on Parallel and Distributed Processing, Orlando, Florida, USA, March 30, 1998

An Interactive Datasheet for the Xilinx XC6200.

Gordon J. Brebner

Proceedings of the Field-Programmable Logic and Applications, 1998

Field-Programmable Logic: Catalyst for New Computing Paradigms.

Gordon J. Brebner

Proceedings of the Field-Programmable Logic and Applications, 1998

Circlets: Circuits as Applets.

Gordon J. Brebner

Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998

ECOLE: A Configurable Environment for a Local Optical Network of Workstations.

Gordon J. Brebner, Rob Pooley

Proceedings of the Network-Based Parallel Computing: Communication, 1998

1997

Automatc identification of swappable logic units in XC6200 circuitry.

Gordon J. Brebner

Proceedings of the Field-Programmable Logic and Applications, 7th International Workshop, 1997

The swappable logic unit: a paradigm for virtual hardware.

Gordon J. Brebner

Proceedings of the 5th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '97), 1997

1996

A Virtual Hardware Operating System for the Xilinx XC6200.

Gordon J. Brebner

Proceedings of the Field-Programmable Logic, 1996

1995

Use of Reconfigurability in Variable-Length Code Detection at Video Rates.

Gordon J. Brebner, John Gray

Proceedings of the Field-Programmable Logic and Applications, 5th International Workshop, 1995

1993

Configurable array logic circuits for computing network error detection codes.

Gordon J. Brebner

J. VLSI Signal Process., 1993

A CCS-based Investigation of Deadlock in a Multi-process Electronic Mail System.

Gordon J. Brebner

Formal Aspects Comput., 1993

1981

Universal Schemes for Parallel Communication

Leslie G. Valiant, Gordon J. Brebner

Proceedings of the 13th Annual ACM Symposium on Theory of Computing, 1981