Giulio Antonini

Orcid: 0000-0001-5433-6173

According to our database1, Giulio Antonini authored at least 19 papers between 2001 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Online presence:

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Bibliography

2024
Design and Optimization of Reconfigurable Intelligent Surfaces Using the PEEC Method.
CoRR, 2024

Multiport Network Modeling for Reconfigurable Intelligent Surfaces: Numerical Validation with a Full-Wave PEEC Simulator.
CoRR, 2024

Efficient Frequency and Time-Domain Simulations of Delayed PEEC Models With Proper Orthogonal Decomposition Techniques.
IEEE Access, 2024

2023
Multi-fidelity error estimation accelerates greedy model reduction of complex dynamical systems.
CoRR, 2023

2022
Model Order Reduction for Delayed PEEC Models With Guaranteed Accuracy and Observed Stability.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

2020
Automated Framework for Time-Domain Piecewise-Linear Fitting Method Based on Digital Wave Processing of S-Parameters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Cagniard-DeHoop Technique-Based Computation of Retarded Partial Coefficients: The Coplanar Case.
IEEE Access, 2020

2019
On the passivity of the quasi-static partial element equivalent circuit method.
Int. J. Circuit Theory Appl., 2019

2016
Rigorous DC Solution of Partial Element Equivalent Circuit Models.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

2013
Skin-Effect Loss Models for Time- and Frequency-Domain PEEC Solver.
Proc. IEEE, 2013

2010
Hybrid Formulation of the Equation Systems of the 3-D PEEC Model Based on Graph Algorithms.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

2009
Input-to-State Stability Analysis of Partial-Element Equivalent-Circuit Models.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

2007
Ladder-Network-Based Model for Interconnects and Transmission Lines Time Delay and cutoff Frequency Determination.
J. Circuits Syst. Comput., 2007

2006
A ladder network delay model for coupled interconnects.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
Ladder network modeling for closed-form interconnect time delay determination.
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

2003
S-Parameters Characterization of Through, Blind, and Buried Via Holes.
IEEE Trans. Mob. Comput., 2003

Fast Multipole and Multifunction PEEC Methods.
IEEE Trans. Mob. Comput., 2003

Fast Multipole Method for Time Domain PEEC Analysis.
IEEE Trans. Mob. Comput., 2003

2001
Fast multipole method based extraction of PEEC parameters.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001


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