Foroozan Karimzadeh

Orcid: 0000-0001-8849-7784

According to our database1, Foroozan Karimzadeh authored at least 11 papers between 2015 and 2024.

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Bibliography

2024
Twofold Sparsity: Joint Bit- and Network-Level Sparsity for Energy-Efficient Deep Neural Network Using RRAM Based Compute-In-Memory.
IEEE Access, 2024

2023
Hardware-Friendly Model Compression techniques for Deep Learning Accelerators.
PhD thesis, 2023

Memory-Based Computing for Energy-Efficient AI: Grand Challenges.
Proceedings of the 31st IFIP/IEEE International Conference on Very Large Scale Integration, 2023

2022
BitS-Net: Bit-Sparse Deep Neural Network for Energy-Efficient RRAM-Based Compute-In-Memory.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Towards CIM-friendly and Energy-Efficient DNN Accelerator via Bit-level Sparsity.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

Towards Energy Efficient DNN accelerator via Sparsified Gradual Knowledge Distillation.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

2021
A Hardware-Friendly Approach Towards Sparse Neural Networks Based on LFSR-Generated Pseudo-Random Sequences.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

2020
Memory and Energy Efficient Method Toward Sparse Neural Network Using LFSR Indexing.
Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020

Hardware-Aware Pruning of DNNs using LFSR-Generated Pseudo-Random Indices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2017
A comparative review on sleep stage classification methods in patients and healthy individuals.
Comput. Methods Programs Biomed., 2017

2015
Presenting efficient features for automatic CAP detection in sleep EEG signals.
Proceedings of the 38th International Conference on Telecommunications and Signal Processing, 2015


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