Douglas Chang

According to our database1, Douglas Chang authored at least 9 papers between 1988 and 1999.

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Bibliography

1999
Partitioning Sequential Circuits on Dynamically Reconfigurable FPGAs.
IEEE Trans. Computers, 1999

1998
Partitioning Sequential Circuits on Dynamically Reconfiguable FPGAs.
Proceedings of the 1998 ACM/SIGDA Sixth International Symposium on Field Programmable Gate Arrays, 1998

Functional Scan Chain Testing.
Proceedings of the 1998 Design, 1998

1997
Buffer Minimization and Time-Multiplexed I/O on Dynamically Reconfigurable FPGAs.
Proceedings of the 1997 ACM/SIGDA Fifth International Symposium on Field Programmable Gate Arrays, 1997

A Test Synthesis Approach to Reducing BALLAST DFT Overhead.
Proceedings of the 34st Conference on Design Automation, 1997

Not necessarily more switches more routability [sic.].
Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

1994
On the NP-completeness of regular 2-D FPGA routing architectures and a novel solution.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

A flow based approach to the pin redistribution problem for multi-chip modules.
Proceedings of the Fourth Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1994

1988
PC-CUBE, a personal computer based hypercube.
Proceedings of the Third Conference on Hypercube Concurrent Computers and Applications, 1988


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