Chao-Ching Hung

According to our database1, Chao-Ching Hung authored at least 6 papers between 2009 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2019

2011
A 40-GHz Fast-Locked All-Digital Phase-Locked Loop Using a Modified Bang-Bang Algorithm.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

A Noise Filtering Technique for Fractional-N Frequency Synthesizers.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

2009
A Leakage-Compensated PLL in 65-nm CMOS Technology.
IEEE Trans. Circuits Syst. II Express Briefs, 2009

A 33.6-to-33.8 Gb/s Burst-Mode CDR in 90 nm CMOS Technology.
IEEE J. Solid State Circuits, 2009

A leakage-suppression technique for phase-locked systems in 65nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009


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