Alessandro S. Spinelli

Orcid: 0000-0002-3290-6734

According to our database1, Alessandro S. Spinelli authored at least 19 papers between 2001 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Investigation of the Moisture- Driven Dynamics of Time- Dependent Dielectric Breakdown in Polymeric Dielectrics for Galvanic Isolators.
Proceedings of the IEEE International Reliability Physics Symposium, 2024

2023
Depassivation of Traps in the Polysilicon Channel of 3D NAND Flash Arrays: Impact on Cell High-Temperature Data Retention.
Proceedings of the IEEE International Reliability Physics Symposium, 2023

Modeling the Temperature Dependence of TDDB in Galvanic Isolators Based on Polymeric Dielectrics.
Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023

2019
Current Transport in Polysilicon-channel GAA MOSFETs: A Modeling Perspective.
Proceedings of the 49th European Solid-State Device Research Conference, 2019

Impact of Program Accuracy and Random Telegraph Noise on the Performance of a NOR Flash-based Neuromorphic Classifier.
Proceedings of the 49th European Solid-State Device Research Conference, 2019

2018
Stochastic Learning in Neuromorphic Hardware via Spike Timing Dependent Plasticity With RRAM Synapses.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

Random Dopant Fluctuation and Random Telegraph Noise in Nanowire and Macaroni MOSFETs.
Proceedings of the 48th European Solid-State Device Research Conference, 2018

2017
Reviewing the Evolution of the NAND Flash Technology.
Proc. IEEE, 2017

Reliability of NAND Flash Memories: Planar Cells and Emerging Issues in 3D Devices.
Comput., 2017

2015
Cycling pattern and read/bake conditions dependence of random telegraph noise in decananometer NAND flash arrays.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

2014
Cycling-induced threshold-voltage instabilities in nanoscale NAND flash memories: Sensitivity to the array background pattern.
Proceedings of the 44th European Solid State Device Research Conference, 2014

Data regeneration and disturb immunity of T-RAM cells.
Proceedings of the 44th European Solid State Device Research Conference, 2014

2013
Accelerated reliability testing of flash memory: Accuracy and issues on a 45nm NOR technology.
Proceedings of 2013 International Conference on IC Design & Technology, 2013

2010
A multi-channel low-power IC for neural spike recording with data compression and narrowband 400-MHz MC-FSK wireless transmission.
Proceedings of the 36th European Solid-State Circuits Conference, 2010

2009
A Low-power Integrated Circuit for Analog Spike Detection and Sorting in Neural Prosthesis Systems.
Proceedings of the BIODEVICES 2009, 2009

2007
An integrated low-noise multichannel system for neural signals amplification.
Proceedings of the 33rd European Solid-State Circuits Conference, 2007

2006
A Switched-capacitor Neural Preamplifier with an Adjustable Pass-band for Fast Recovery following Stimulation.
Proceedings of the 28th International Conference of the IEEE Engineering in Medicine and Biology Society, 2006

2002
Post-breakdown characterization in thin gate oxides.
Microelectron. Reliab., 2002

2001
Electrical characterization and quantum modeling of MOS capacitors with ultra-thin oxides (1.4-3 nm).
Microelectron. Reliab., 2001


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