Alejandro Rico

According to our database, Alejandro Rico authored at least 35 papers between 2009 and 2023.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2023

DynAMO: Improving Parallelism Through Dynamic Placement of Atomic Memory Operations.

Víctor Soria Pardos, Adrià Armejach, Tiago Mück, Darío Suárez Gracia, José A. Joao, Alejandro Rico, Miquel Moretó

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

2022

System technology co-optimization and design challenges for 3D IC.

Supreet Jeloka, Brian Cline, Shidhartha Das, Benoit Labbe, Alejandro Rico, Rainer Herberholz, Javier A. DeLaCruz, Rahul Mathur, Shawn Hung

Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

2021

Power Delivery and Thermal-Aware Arm-Based Multi-Tier 3D Architecture.

Lingjun Zhu, Tuan Ta, Rossana Liu, Rahul Mathur, Xiaoqing Xu, Shidhartha Das, Ankit Kaul, Alejandro Rico, Doug Joseph, Brian Cline, Sung Kyu Lim

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021

2020

Towards Data-Flow Parallelization for Adaptive Mesh Refinement Applications.

Kevin Sala, Alejandro Rico, Vicenç Beltran

Proceedings of the IEEE International Conference on Cluster Computing, 2020

2019

Sampled Simulation of Task-Based Programs.

Thomas Grass, Trevor E. Carlson, Alejandro Rico, Germán Ceballos, Eduard Ayguadé, Marc Casas, Miquel Moretó

IEEE Trans. Computers, 2019

On the maturity of parallel applications for asymmetric multi-core processors.

Kallia Chronaki, Miquel Moretó, Marc Casas, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Mateo Valero

J. Parallel Distributed Comput., 2019

DynaSprint: Microarchitectural Sprints with Dynamic Utility and Thermal Management.

Ziqiang Huang, José A. Joao, Alejandro Rico, Andrew D. Hilton, Benjamin C. Lee

Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

On the Benefits of Tasking with OpenMP.

Alejandro Rico, Isaac Sánchez Barrera, José A. Joao, Joshua Randall, Marc Casas, Miquel Moretó

Proceedings of the OpenMP: Conquering the Full Hardware Spectrum, 2019

Cache Line Sharing and Communication in ECP Proxy Applications.

Joshua Randall, Alejandro Rico, José A. Joao

Proceedings of the OpenMP: Conquering the Full Hardware Spectrum, 2019

Scaling up performance of fat nodes for HPC.

Alejandro Rico

Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019

2017

Task Scheduling Techniques for Asymmetric Multi-Core Systems.

Kallia Chronaki, Alejandro Rico, Marc Casas, Miquel Moretó, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero

IEEE Trans. Parallel Distributed Syst., 2017

The ARM Scalable Vector Extension.

Nigel Stephens, Stuart Biles, Matthias Boettcher, Jacob Eapen, Mbou Eyole, Giacomo Gabrielli, Matt Horsnell, Grigorios Magklis, Alejandro Martinez, Nathanaël Prémillieu, Alastair Reid, Alejandro Rico, Paul Walker

IEEE Micro, 2017

Adaptive Runtime-Assisted Block Prefetching on Chip-Multiprocessors.

Victor Garcia, Alejandro Rico, Carlos Villavieja, Paul M. Carpenter, Nacho Navarro, Alex Ramírez

Int. J. Parallel Program., 2017

Sharing the instruction cache among lean cores on an asymmetric CMP for HPC applications.

Ugljesa Milic, Alejandro Rico, Paul M. Carpenter, Alex Ramírez

Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017

ARM HPC Ecosystem and the Reemergence of Vectors: Invited Paper.

Alejandro Rico, José A. Joao, Chris Adeniyi-Jones, Eric Van Hensbergen

Proceedings of the Computing Frontiers Conference, 2017

2016

The mont-blanc prototype: an alternative approach for HPC systems.

Nikola Rajovic, Alejandro Rico, Filippo Mantovani, Daniel Ruiz, Josep Oriol Vilarrubi, Constantino Gómez, Luna Backes, Diego Nieto, Harald Servat, Xavier Martorell, Jesús Labarta, Eduard Ayguadé, Chris Adeniyi-Jones, Said Derradji, Hervé Gloaguen, Piero Lanucara, Nico Sanna, Jean-François Méhaut, Kevin Pouget, Brice Videau, Eric Boyer, Momme Allalen, Axel Auweter, David Brayford, Daniele Tafani, Volker Weinberg, Dirk Brömmel, René Halver, Jan H. Meinke, Ramón Beivide, Mariano Benito, Enrique Vallejo, Mateo Valero, Alex Ramírez

Proceedings of the International Conference for High Performance Computing, 2016

MUSA: a multi-level simulation approach for next-generation HPC machines.

Thomas Grass, César Allande, Adrià Armejach, Alejandro Rico, Eduard Ayguadé, Jesús Labarta, Mateo Valero, Marc Casas, Miquel Moretó

Proceedings of the International Conference for High Performance Computing, 2016

TaskPoint: Sampled simulation of task-based programs.

Thomas Grass, Alejandro Rico, Marc Casas, Miquel Moretó, Eduard Ayguadé

Proceedings of the 2016 IEEE International Symposium on Performance Analysis of Systems and Software, 2016

Rebalancing the core front-end through HPC code analysis.

Ugljesa Milic, Paul M. Carpenter, Alejandro Rico, Alex Ramírez

Proceedings of the 2016 IEEE International Symposium on Workload Characterization, 2016

Evaluating the effect of last-level cache sharing on integrated GPU-CPU systems with heterogeneous applications.

Victor Garcia, Juan Gómez-Luna, Thomas Grass, Alejandro Rico, Eduard Ayguadé, Antonio J. Peña

Proceedings of the 2016 IEEE International Symposium on Workload Characterization, 2016

POSTER: Exploiting Asymmetric Multi-Core Processors with Flexible System Sofware.

Kallia Chronaki, Miquel Moretó, Marc Casas, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero

Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

2015

Experiences in speeding up computer vision applications on mobile computing platforms.

Luna Backes, Alejandro Rico, Björn Franke

Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015

Criticality-Aware Dynamic Task Scheduling for Heterogeneous Architectures.

Kallia Chronaki, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero

Proceedings of the 29th ACM on International Conference on Supercomputing, 2015

2014

Tibidabo: Making the case for an ARM-based HPC system.

Nikola Rajovic, Alejandro Rico, Nikola Puzovic, Chris Adeniyi-Jones, Alex Ramírez

Future Gener. Comput. Syst., 2014

Evaluating Execution Time Predictability of Task-Based Programs on Multi-Core Processors.

Thomas Grass, Alejandro Rico, Marc Casas, Miquel Moretó, Alex Ramírez

Proceedings of the Euro-Par 2014: Parallel Processing Workshops, 2014

2013

Raising the level of abstraction: simulation of large chip multiprocessors running multithreaded applications.

Alejandro Rico Carro

PhD thesis, 2013

Trace filtering of multithreaded applications for CMP memory simulation.

Alejandro Rico, Alex Ramírez, Mateo Valero

Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2013

Experiences with mobile processors for energy efficient HPC.

Nikola Rajovic, Alejandro Rico, James Vipond, Isaac Gelado, Nikola Puzovic, Alex Ramírez

Proceedings of the Design, Automation and Test in Europe, 2013

2012

On the simulation of large-scale architectures using multiple application abstraction levels.

Alejandro Rico, Felipe Cabarcas, Carlos Villavieja, Milan Pavlovic, Augusto Vega, Yoav Etsion, Alex Ramírez, Mateo Valero

ACM Trans. Archit. Code Optim., 2012

2011

Trace-driven simulation of multithreaded applications.

Alejandro Rico, Alejandro Duran, Felipe Cabarcas, Yoav Etsion, Alex Ramírez, Mateo Valero

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2011

2010

Interleaving granularity on high bandwidth memory architecture for CMPs.

Felipe Cabarcas, Alejandro Rico, Yoav Etsion, Alex Ramírez

Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010

Task Superscalar: An Out-of-Order Task Pipeline.

Yoav Etsion, Felipe Cabarcas, Alejandro Rico, Alex Ramírez, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta, Mateo Valero

Proceedings of the 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 2010

Comparing last-level cache designs for CMP architectures.

Augusto Vega, Alejandro Rico, Felipe Cabarcas, Alex Ramírez, Mateo Valero

Proceedings of the Second International Forum on Next-Generation Multicore/Manycore Technologies, 2010

Performance and power evaluation of an in-line accelerator.

Alejandro Rico, Jeff H. Derby, Robert K. Montoye, Timothy H. Heil, Chen-Yong Cher, Pradip Bose

Proceedings of the 7th Conference on Computing Frontiers, 2010

2009

Available task-level parallelism on the Cell BE.

Alejandro Rico, Alex Ramírez, Mateo Valero

Sci. Program., 2009